JAJSSI7J August   2001  – December 2023 UCC29002 , UCC39002

PRODUCTION DATA  

  1.   1
  2. 1特長
  3. 2アプリケーション
  4. 3概要
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Differential Current-Sense Amplifier (CS+, CS−, CSO)
      2. 6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)
      3. 6.3.3 Load-Share Bus Receiver Amplifier (LS)
      4. 6.3.4 Error Amplifier (EAO)
      5. 6.3.5 Adjust Amplifier Output (ADJ)
      6. 6.3.6 Enable Function (CS+, CS−)
      7. 6.3.7 Fault Protection on LS Bus
      8. 6.3.8 Start-Up and Adjust Logic
      9. 6.3.9 Bias Input and Bias_OK Circuit (VDD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal Running Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Disabled Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Paralleling the Power Modules
    3. 7.3 Typical Application
      1. 7.3.1 Measuring the Voltage Loop of a Power Module
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 The Shunt Resistor
        2. 7.3.2.2 The CSA Gain
        3. 7.3.2.3 Determining RADJ
        4. 7.3.2.4 Error Amplifier Compensation
      3. 7.3.3 Application Curve
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
      1. 8.1.1 Documentation Support
    2. 8.2 Related Links
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)

The load-share bus driver is a unity-gain buffer amplifier to provide separation between the output of the current-sense amplifier and the load-share bus voltage. The circuit implements an ideal diode with virtually 0V forward voltage drop by placing the diode inside the feedback loop of the amplifier. The diode function is used to automatically establish the role of the leader module in the overall load-sharing system. In the system, the UCC29002 device that becomes the leader uses the load-share bus driver amplifier to drive its output-current information onto the load-share bus for all follower modules to emulate.

Assuming identical module design, any UCC29002 may assume the role of leader at any time depending on input and output conditions. Leadership is not fixed to one specific module. All follower modules will have lower output current levels by definition, and their ideal diodes are reversed biased (VCSO < VLS). Consequently, the follower VCSO and VLS signals will be separated. This separation allows the error amplifier of the follower UCC29002 device to compare its respective module output current to the output current of the leader module and make the necessary feedback-loop adjustments to achieve a balanced current distribution.

Because the LS bus is always driven by a single load-share bus driver (in the leader module), the total number of load-sharing modules (Nm) that may be connected to the LS bus is limited by the output-current capability of the leader's bus-driver amplifier according to Equation 1.

Equation 1. Nm =   I O U T , M I N V L S , F U L L _ S C A L E / 100   k Ω

where

Note:

The number of parallel modules Nm can be increased by reducing the full-scale LS bus voltage, that is, by reducing the current-sense amplifier gain ACSA of all modules (provided that ACSA > 3). However, lower ACSA reduces current-sharing accuracy.