SLUSG03 December   2024 UCC57102Z-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Driver Stage
      3. 6.3.3 Desaturation (DESAT) Protection
      4. 6.3.4 Fault (FLT)
      5. 6.3.5 VREF
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7  Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VDD Undervoltage Lockout
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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発注情報

5.8 Typical Characteristics

Unless otherwise specified, VDD=15V, VEE=0V, IN=3.3V, EN=5V, TJ = 25 °C, No load

UCC57102Z-Q1 Quiescent Current
VDD = 6.5V
Figure 5-5 Quiescent Current
UCC57102Z-Q1 Disable Current
Figure 5-7 Disable Current
UCC57102Z-Q1 UVLO Threshold Figure 5-9 UVLO Threshold
UCC57102Z-Q1 Input Pulldown ResistanceFigure 5-11 Input Pulldown Resistance
UCC57102Z-Q1 Output Pulldown Resistance Figure 5-13 Output Pulldown Resistance
UCC57102Z-Q1 Output Fall Time
CLOAD = 1.8 nF
Figure 5-15 Output Fall Time
UCC57102Z-Q1 Input to Output Rising (Turnon) Propagation Delay
CLOAD = 1.8 nF
Figure 5-17 Input to Output Rising (Turnon) Propagation Delay
UCC57102Z-Q1 Input Propagation Delay
CLOAD = 1.8 nF
Figure 5-19 Input Propagation Delay
UCC57102Z-Q1 Vref Voltage vs TemperatureFigure 5-21 Vref Voltage vs Temperature
UCC57102Z-Q1 DESAT Charge Currentvs TemperatureFigure 5-23 DESAT Charge Currentvs Temperature
UCC57102Z-Q1 Peak Source and Sink Current
CLOAD = 100 nF
Figure 5-25 Peak Source and Sink Current
UCC57102Z-Q1 Operating Static Supply Current
Figure 5-6 Operating Static Supply Current
UCC57102Z-Q1 Operating Supply Current
CLOAD = 1.8 nF
Figure 5-8 Operating Supply Current
UCC57102Z-Q1 Input Threshold Figure 5-10 Input Threshold
UCC57102Z-Q1 Output Pullup Resistance vs VDDFigure 5-12 Output Pullup Resistance vs VDD
UCC57102Z-Q1 Output Rise Time
CLOAD = 1.8 nF
Figure 5-14 Output Rise Time
UCC57102Z-Q1 Output Rise and Fall Time
CLOAD = 1.8 nF
Figure 5-16 Output Rise and Fall Time
UCC57102Z-Q1 Input to Output Falling (Turnoff) Propagation Delay
CLOAD = 1.8 nF
Figure 5-18 Input to Output Falling (Turnoff) Propagation Delay
UCC57102Z-Q1 Vref Voltage vs VDDFigure 5-20 Vref Voltage vs VDD
UCC57102Z-Q1 Soft Turn Off Pulldown Resistance vs VDDFigure 5-22 Soft Turn Off Pulldown Resistance vs VDD
UCC57102Z-Q1 DESAT Threshold vs Temperature Figure 5-24 DESAT Threshold vs Temperature
UCC57102Z-Q1 FLTb vs Temperature
IFLTb_sink = 15mA
Figure 5-26 FLTb vs Temperature