SLUSC66E
March 2015 – February 2017
UCD3138A
PRODUCTION DATA.
1
Device Overview
1.1
Features
1.2
Applications
1.3
Description
1.4
Functional Block Diagram
2
Device Comparison
2.1
Product Selection Matrix
3
Pin Configuration and Functions
3.1
UCD3138A RGC Package
3.2
UCD3138A RMH Package
3.3
UCD3138A RJA Package
4
Specifications
4.1
Absolute Maximum Ratings
4.2
ESD Ratings
4.3
Recommended Operating Conditions
4.4
Thermal Information
4.5
Electrical Characteristics
4.6
PMBus/SMBus/I2C Timing
4.7
Peripherals
4.7.1
Digital Power Peripherals (DPPs)
4.7.1.1
Front End
4.7.1.2
DPWM Module
4.7.1.3
DPWM Events
4.7.1.4
High Resolution DPWM
4.7.1.5
Oversampling
4.7.1.6
DPWM Interrupt Generation
4.7.1.7
DPWM Interrupt Scaling/Range
4.7.1.8
DPWM Synchronization
4.7.1.9
Synchronous Rectifier Dead-Time Optimization Peripheral
4.8
Typical Temperature Characteristics
5
Parametric Measurements Information
5.1
Power-On Reset (POR) and Brown-Out Reset (BOR)
6
Detailed Description
6.1
Overview
6.2
ARM Processor
6.3
Memory
6.3.1
CPU Memory Map and interruptions
6.3.2
Boot ROM
6.3.3
Customer Boot Program
6.3.4
Flash Management
6.4
System Module
6.4.1
Address Decoder (DEC)
6.4.2
Memory Management Controller (MMC)
6.4.3
System Management (SYS)
6.4.4
Central Interrupt Module (CIM)
6.5
Feature Description
6.5.1
Sync FET Ramp and IDE Calculation
6.5.2
Automatic Mode Switching
6.5.2.1
Phase Shifted Full Bridge Example
6.5.2.2
LLC Example
6.5.2.3
Mechanism for Automatic Mode Switching
6.5.3
DPWMC, Edge Generation, IntraMux
6.5.4
Filter
6.5.4.1
Loop Multiplexer
6.5.4.2
Fault Multiplexer
6.5.5
Communication Ports
6.5.5.1
SCI (UART) Serial Communication Interface
6.5.5.2
PMBus Interfacte
6.5.5.3
General Purpose ADC12
6.5.5.4
Timers
6.5.5.4.1
24-bit PWM Timer
6.5.5.4.2
16-Bit PWM Timers
6.5.5.4.3
Watchdog Timer
6.5.6
Miscellaneous Analog
6.5.7
Package ID Information
6.5.8
Brownout
6.5.9
Global I/O
6.5.10
Temperature Sensor Control
6.5.11
I/O Mux Control
6.5.12
Current Sharing Control
6.5.13
Temperature Reference
7
Device Functional Modes
7.1
Normal Mode
7.2
DPWM Multiple Output Mode
7.3
DPWM Resonant Mode
7.4
Triangular Mode
7.5
Leading Edge Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
PCMC (Peak Current Mode Control) PSFB (Phase-Shifted Full Bridge) Hardware Configuration Overview
8.2.2.2
DPWM Initialization for PSFB
8.2.3
Fixed Signals to Bridge
8.2.4
Dynamic Signals to Bridge
8.2.5
System Initialization for PCM
8.2.5.1
Use of Front Ends and Filters in PSFB
8.2.5.2
Peak Current Detection
8.2.5.3
Peak Current Mode (PCM)
8.2.6
Application Curves
9
Power Supply Recommendations
9.1
Power Supply Decoupling and Bulk Capacitors
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Development Support
11.1.1.1
Tools and Documentation
11.2
Documentation Support
11.2.1
References
11.3
Receiving Notification of Documentation Updates
11.4
Community Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical Packaging and Orderable Information
12.1
Packaging Information
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
RJA|40
MPQF467A
RMH|40
MPQF388A
RGC|64
MPQF125F
サーマルパッド・メカニカル・データ
RJA|40
QFND826
RGC|64
QFND102O
発注情報
slusc66e_oa
slusc66e_pm
9
Power Supply Recommendations
9.1
Power Supply Decoupling and Bulk Capacitors
Both 3.3 VD and 3.3 VA should have a local 4.7-μF capacitor placed as close as possible to the device pins.
BP18 should have a 1-μF capacitor.