SLUSDC1
September 2018
UCD90320U
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Simplified Application
4
Revision History
5
Description Continued
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Non-Volatile Memory Characteristics
7.7
I2C/PMBus Interface Timing Requirements
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
TI Fusion Digital Power Designer software
8.3.2
PMBUS Interface
8.3.3
Rail Setup
8.4
Device Functional Modes
8.4.1
Rail Monitoring Configuration
8.4.2
GPI Configuration
8.4.3
Rail Sequence Configuration
8.4.4
Fault Responses Configuration
8.4.5
GPO Configuration
8.4.5.1
Command Controlled GPO
8.4.5.2
Logic GPO
8.4.6
Margining Configuration
8.4.7
Pin Selected Rail States Configuration
8.4.8
Watchdog Timer
8.4.9
System Reset Function
8.4.10
Cascading Multiple Devices
8.4.11
Rail Monitoring
8.4.12
Status Monitoring
8.4.13
Data and Error Logging to EEPROM Memory
8.4.14
Black Box First Fault Logging
8.4.15
PMBus Address Selection
8.4.16
ADC Reference
8.4.17
Device Reset
8.4.18
Brownout
8.4.19
Internal Fault Management
8.4.20
Single Event Upset
8.5
Device Configuration and Programming
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Community Resources
12.2
Receiving Notification of Documentation Updates
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ZWS|169
MPBGAK4B
サーマルパッド・メカニカル・データ
発注情報
slusdc1_oa
slusdc1_pm
1
Features
Ultra Low Alpha(ULA) Mold Compound to reduce soft errors caused by alpha particles
Single Event Upset (SEU) Detection
Sequence, Monitor, and Margin 24 Voltage Rails Plus 8 Digital Rails
Monitor and Respond to OV, UV, OC, UC, Temperature, Time-Out, and GPI-Triggered Faults
Flexible Sequence-On and Off Dependencies, Delay Time, Boolean Logic, and GPIO Configuration to Support Complex Sequencing Applications
Four Rail Profiles for Adaptive Voltage Identification (AVID) Voltage Regulator
High-Accuracy Closed-Loop Margining
Active Trim Function Improves Rail Output Voltage Accuracy
Advanced Nonvolatile Event Logging To Assist System Debugging
Single-Event Fault Log (100 entries)
Peak Value Log
Black Box Fault Log to Save Status of All Rails and I/O Pins at the First Fault
Easily Cascade Up to 4 Power Sequencers and Take Coordinated Fault Responses
Programmable Watchdog Timer and System Reset