JAJSHP9E
November 2007 – July 2019
VCA824
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
差動イコライザ
RC 負荷の差動イコライゼーション
4
改訂履歴
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics: VS = ±5 V
7.6
Typical Characteristics: VS = ±5 V, AVMAX = 2 V/V
7.7
Typical Characteristics: VS = ±5 V, AVMAX = 10 V/V
7.8
Typical Characteristics: VS = ±5 V, AVMAX = 40 V/V
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Maximum Gain Of Operation
8.4.2
Output Current And Voltage
8.4.3
Input Voltage Dynamic Range
8.4.4
Output Voltage Dynamic Range
8.4.5
Bandwidth
8.4.6
Offset Adjustment
8.4.7
Noise
8.4.8
Input and ESD Protection
9
Application and Implementation
9.1
Application Information
9.1.1
Difference Amplifier
9.1.2
Differential Equalizer
9.1.3
Differential Cable Equalizer
9.1.4
Voltage-Controlled Lowpass Filter [application sub]
9.1.5
Wideband Variable Gain Amplifier Operation
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Thermal Considerations
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
デバイス・サポート
12.1.1
開発サポート
12.1.1.1
デモ用基板
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGS|10
MPDS035C
D|14
MPDS177H
サーマルパッド・メカニカル・データ
発注情報
jajshp9e_oa
jajshp9e_pm
7.6
Typical Characteristics: V
S
= ±5 V, A
VMAX
= 2 V/V
At T
A
= 25°C, R
L
= 100 Ω, R
F
= 453 Ω, R
G
= 453 Ω, V
G
= 1 V, V
IN
= single-ended input on +V
IN
with –V
IN
at ground, and 14-Pin SOIC package, unless otherwise noted.
Figure 1.
Small-Signal Frequency Response
Figure 3.
Small-Signal Pulse Response
Figure 5.
Composite Video dG/dP
Figure 7.
Harmoneic Distortion vs Frequency
Figure 9.
Harmonic Distortion vs Output Voltage
Figure 11.
Two-Tone, 3rd-Order Intermodulation Intercept
Figure 13.
Gain vs Gain Control Voltage
Figure 15.
Gain Control Pulse Response
Figure 17.
Group Delay vs Gain Control Voltage
Figure 19.
Recommended R
S
vs Capacitive Load
Figure 21.
Output Voltage Density
Figure 2.
Large-Signal Frequency Response
Figure 4.
Large-Signal Pulse Response
Figure 6.
Gain Flatness, Deviation From Linear Phase
Figure 8.
Harmonic Distortion vs Load Resistance
Figure 10.
Harmonic Distortion vs Gain Control Voltage
Figure 12.
Two-Tone, 3rd-Order Intermodulation Intercept vs Gain Control Voltage
Figure 14.
Gain Control Frequency Response
Figure 16.
Fully-Attenuated Response
Figure 18.
Group Delay vs Frequency
Figure 20.
Frequency Response vs Capacitive Load
Figure 22.
Input Current Noise Density