JAJSHP9E November   2007  – July 2019 VCA824

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      差動イコライザ
      2.      RC 負荷の差動イコライゼーション
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V, AVMAX = 2 V/V
    7. 7.7 Typical Characteristics: VS = ±5 V, AVMAX = 10 V/V
    8. 7.8 Typical Characteristics: VS = ±5 V, AVMAX = 40 V/V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Gain Of Operation
      2. 8.4.2 Output Current And Voltage
      3. 8.4.3 Input Voltage Dynamic Range
      4. 8.4.4 Output Voltage Dynamic Range
      5. 8.4.5 Bandwidth
      6. 8.4.6 Offset Adjustment
      7. 8.4.7 Noise
      8. 8.4.8 Input and ESD Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Difference Amplifier
      2. 9.1.2 Differential Equalizer
      3. 9.1.3 Differential Cable Equalizer
      4. 9.1.4 Voltage-Controlled Lowpass Filter [application sub]
      5. 9.1.5 Wideband Variable Gain Amplifier Operation
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 デモ用基板
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.6 Offset Adjustment

As a result of the internal architecture used on the VCA824, the output offset voltage originates from the output stage and from the input stage and multiplier core. Figure 67 shows how to compensate both sources of the output offset voltage. Use this procedure to compensate the output offset voltage: starting with the output stage compensation, set VG = –1 V to eliminate all offset contribution of the input stage and multiplier core. Adjust the output stage offset compensation potentiometer. Finally, set VG = 1 V to the maximum gain and adjust the input stage and multiplier core potentiometer. This procedure effectively eliminates all offset contribution at the maximum gain. Because adjusting the gain modifies the contribution of the input stage and the multiplier core, some residual output offset voltage remains.