JAJSHP9E November   2007  – July 2019 VCA824

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      差動イコライザ
      2.      RC 負荷の差動イコライゼーション
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V, AVMAX = 2 V/V
    7. 7.7 Typical Characteristics: VS = ±5 V, AVMAX = 10 V/V
    8. 7.8 Typical Characteristics: VS = ±5 V, AVMAX = 40 V/V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Maximum Gain Of Operation
      2. 8.4.2 Output Current And Voltage
      3. 8.4.3 Input Voltage Dynamic Range
      4. 8.4.4 Output Voltage Dynamic Range
      5. 8.4.5 Bandwidth
      6. 8.4.6 Offset Adjustment
      7. 8.4.7 Noise
      8. 8.4.8 Input and ESD Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Difference Amplifier
      2. 9.1.2 Differential Equalizer
      3. 9.1.3 Differential Cable Equalizer
      4. 9.1.4 Voltage-Controlled Lowpass Filter [application sub]
      5. 9.1.5 Wideband Variable Gain Amplifier Operation
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 デモ用基板
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.1.2 Differential Equalizer

If the application requires frequency shaping (the transition from one gain to another), the VCA824 can be used advantageously because its architecture allows the application to isolate the input from the gain setting elements. Figure 70 shows an implementation of such a configuration. The transfer function is shown in Equation 5.

Equation 5. VCA824 q_g_2_rfrg_bos394.gif
VCA824 ai_diff_equal_bos394.gifFigure 70. Differential Equalizer

This transfer function has one pole, P1 (located at RGC1), and one zero, Z1 (located at R1C1). When equalizing an RC load, RL and CL, compensate the pole added by the load located at RLCL with the zero Z1. Knowing RL, CL, and RG allows the user to select C1 as a first step and then calculate R1. Using RL = 75-Ω, CL = 100pF and wanting the VCA824 to operate at a gain of 2 V/V, which gives RF = RG = 453-kΩ, allows the user to select
C1 = 15.5 pF to ensure a positive value for the resistor R1. With all these values known, to achieve greater than 300 MHz bandwidth, R1 can be calculated to be 20-Ω. Figure 71 shows the frequency response for both the initial, unequalized frequency response and the resulting equalized frequency response.

VCA824 ai_diff_rc_bos394.gifFigure 71. Differential Equalization of an RC Load