JAJSES0
February 2018
XTR305
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
代表的なアプリケーション
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: Voltage Output Mode
6.6
Electrical Characteristics: Current Output Mode
6.7
Electrical Characteristics: Operational Amplifier (OPA)
6.8
Electrical Characteristics: Instrumentation Amplifier (IA)
6.9
Electrical Characteristics: Current Monitor
6.10
Electrical Characteristics: Power and Digital
6.11
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Functional Features
7.3.2
Current Monitor
7.3.3
Error Flags
7.3.4
Power On/Off Glitch
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Voltage Output Mode
8.2.2.2
Current Output Mode
8.2.2.3
Input Signal Connection
8.2.2.4
Externally-Configured Mode: OPA and IA
8.2.2.5
Driver Output Disable
8.2.2.6
Driving Capacitive Loads and Loop Compensation
8.2.2.7
Internal Current Sources, Switching Noise, and Settling Time
8.2.2.8
IA Structure, Voltage Monitor
8.2.2.9
Digital I/O and Ground Considerations
8.2.2.10
Output Protection
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
VQFN Package and Heat Sinking
10.4
Power Dissipation
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントのサポート
11.1.1
関連資料
11.2
ドキュメントの更新通知を受け取る方法
11.3
コミュニティ・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGW|20
MPQF122C
サーマルパッド・メカニカル・データ
RGW|20
QFND012L
発注情報
jajses0_oa
6.11
Typical Characteristics
at T
A
= 25°C and V+ = ±20 V, unless otherwise noted
Figure 1.
Quiescent Current vs Temperature
(V
IN
, SET, IA
IN+
, IA
IN−
, RG1, RG2)
Figure 3.
Input Bias Current vs Temperature
Figure 5.
OPA Gain and Phase vs Frequency
Figure 7.
OPA CMRR and PSRR vs Frequency
Figure 9.
Small-Signal Step Response
Current Mode
Figure 11.
Small-Signal Step Response
Voltage Mode
Figure 13.
Input-Referred Noise Spectrum
Voltage Output Mode
Figure 15.
Input-Referred Noise Spectrum
Current Output Mode
Figure 17.
IA Input-Referred Noise Spectrum
Figure 19.
OPA Offset Voltage Distribution
Figure 21.
OPA Offset Voltage Drift Distribution
Figure 23.
Voltage Mode Gain Error Distribution
Figure 25.
Voltage Mode Nonlinearity Distribution
Figure 27.
Voltage Mode Gain Error Drift Distribution
Figure 29.
Voltage Mode Nonlinearity Drift Distribution
Figure 31.
Positive Current Limit vs Temperature
(±24-mA End Point Calibration)
Figure 33.
Nonlinearity vs Output Current
Figure 2.
Quiescent Current vs Supply Voltage
Figure 4.
OPA Output Swing to Rail vs Temperature
Figure 6.
IA Gain and Phase vs Frequency
Figure 8.
IA CMRR and PSRR vs Frequency
Figure 10.
Large-Signal Step Response
Current Mode
Figure 12.
Large-Signal Step Response
Voltage Mode
Figure 14.
Input-Referred 0.1-Hz to 10-Hz Noise
Voltage Output Mode
Figure 16.
Input-Referred 0.1-Hz to 10-Hz Noise
Current Output Mode
Figure 18.
IA Input-Referred 0.1-Hz to 10-Hz Noise
Figure 20.
IA Offset Voltage Distribution
Figure 22.
IA Offset Voltage Drift Distribution
Figure 24.
Current Mode Gain Error Distribution
Figure 26.
Current Mode Nonlinearity Distribution
Figure 28.
Current Mode Gain Error Drift Distribution
Figure 30.
Current Mode Nonlinearity Drift Distribution
Figure 32.
Negative Current Limit vs Temperature
(±20-mA End Point Calibration)
Figure 34.
Nonlinearity vs Output Current