The Texas Instruments bq3050 Compensated End-of-Discharge Voltage (CEDV) Gas Gauge and Battery Pack Manager is a single-chip solution that provides a rich array of features for protection, authentication, and data gathering for 2-series, 3-series, and 4-series cell Li-Ion and Li-Polymer battery packs.
Using its integrated high-performance analog peripherals, the bq3050 device measures and maintains an accurate record of available capacity, voltage, current, temperature, and other critical parameters in Li-Ion or Li-Polymer batteries, and reports this information to the system host controller over an SMBus v1.1 compatible interface.
The bq3050 provides software-based 1st-level and 2nd-level safety protection for overvoltage, undervoltage, overtemperature, and overcharge conditions, as well as hardware-based protection for overcurrent in discharge and short circuit in charge and discharge conditions.
SHA-1 authentication with secure memory for authentication keys enables identification of genuine battery packs beyond any doubt.
The compact 38-lead TSSOP package minimizes solution cost and size for smart batteries while providing maximum functionality and safety for battery gauging applications.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
bq3050 | TSSOP (38) | 9.70 mm × 4.40 mm |
Changes from C Revision (December 2014) to D Revision
Changes from B Revision (October 2013) to C Revision
Changes from A Revision (June 2011) to B Revision
Changes from * Revision (January 2011) to A Revision
PIN NAME | PIN NUMBER | TYPE(1) | DESCRIPTION |
---|---|---|---|
CHG | 1 | O | Charge N-FET gate drive |
PCR | 2 | O | Internal Precharge FET output |
BAT | 3 | P | Alternate power source |
VC1 | 4 | I | Sense input for positive voltage of top most cell in stack and cell balancing input for top most cell in stack |
VC2 | 5 | I | Sense input for positive voltage of third lowest cell in stack and cell balancing input for third lowest cell in stack |
VC3 | 6 | I | Sense input for positive voltage of second lowest cell in stack and cell balancing input for second lowest cell in stack |
VC4 | 7 | I | Sense input for positive voltage of lowest cell in stack and cell balancing input for lowest cell in stack |
VSS | 8 | P | Device ground |
VSS | 9 | P | Device ground |
TS1 | 10 | AI | Temperature sensor 1 thermistor input |
SRP | 11 | AI | Differential Coulomb Counter input |
NC | 12 | — | Not internally connected. Connect to VSS. |
SRN | 13 | AI | Differential Coulomb Counter input |
NC | 14 | — | Not internally connected. Connect to VSS. |
TS2 | 15 | AI | Temperature sensor 2 thermistor input |
PRES | 16 | I | Host system present input |
SMBD | 17 | I/OD | SMBus v1.1 data line |
NC | 18 | — | Not internally connected. Connect to VSS. |
SMBC | 19 | I/OD | SMBus v1.1 clock line |
DISP | 20 | I | Display active input |
NC | 21 | — | Not internally connected. Connect to VSS. |
LED5 | 22 | O | LED display constant current sink |
LED4 | 23 | O | LED display constant current sink |
LED3 | 24 | O | LED display constant current sink |
LED2 | 25 | O | LED display constant current sink |
LED1 | 26 | O | LED display constant current sink |
RBI | 27 | P | RAM backup |
REG25 | 28 | P | 2.5-V regulator output |
VSS | 29 | P | Device ground |
VSS | 30 | P | Device ground |
REG33 | 31 | P | 3.3-V regulator output |
TEST | 32 | — | Test pin, connect to VSS through 10-kΩ resistor |
FUSE | 33 | O | Fuse drive |
PCHGIN | 34 | I | Internal Precharge FET input |
VCC | 35 | P | Power supply voltage |
GPOD | 36 | I/OD | High voltage general purpose I/O |
PACK | 37 | P | Alternate power source |
DSG | 38 | O | Discharge N-FET gate drive |