SLUS928B March   2009  – July 2016

 

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Device Images
      1.      System Partitioning Diagram
  4. 4Revision History
  5. 5Pin Configuration and Functions
    1.     Pin Functions
  6. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. 7Detailed Description
    1. 7.1 Feature Description
      1. 7.1.1  Battery Parameter Measurements
        1. 7.1.1.1 Charge and Discharge Counting
        2. 7.1.1.2 Voltage
        3. 7.1.1.3 Voltage Calibration and Accuracy
        4. 7.1.1.4 Current
        5. 7.1.1.5 Auto Calibration
        6. 7.1.1.6 Temperature
      2. 7.1.2  Primary (1st Level) Safety Features
      3. 7.1.3  Secondary (2nd Level) Safety Features
      4. 7.1.4  Charge Control Features
      5. 7.1.5  Gas Gauging
      6. 7.1.6  Lifetime Data Logging Features
      7. 7.1.7  Authentication
      8. 7.1.8  Configuration
        1. 7.1.8.1 System Present Operation
        2. 7.1.8.2 2-, 3-, or 4-Cell Configuration
        3. 7.1.8.3 Cell Balance Control
      9. 7.1.9  Communications
        1. 7.1.9.1 SMBus On and Off State
      10. 7.1.10 SBS Commands
    2. 7.2 Device Functional Modes
      1. 7.2.1 Power Modes
  8. 8Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Community Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Advanced CEDV (Compensated End-of-Discharge Voltage) Gauging
  • Fully Integrated 2, 3, and 4 Series Li-Ion or Li-Polymer Cell Battery Pack Manager
  • 8-Bit RISC CPU With Ultra-Low Power Modes
  • Full Array of Programmable Protection Features
    • Voltage, Current, and Temperature
  • SHA-1 Authentication
  • Flexible Memory Architecture With Integrated Flash Memory
  • Supports Two-Wire SMBus v1.1 Interface With High-speed 400kHz Programming Option
  • P-CH High Side Protection FET Drive
  • Low Power Consumption Sleep Mode: < 69 μA
  • High-Accuracy Analog Front End With Two Independent ADCs
    • High-Resolution, 15~22-bit Integrator for Coulomb Counting
    • 16-Bit Delta-Sigma ADC With a 16-Channel Multiplexer for Voltage, Current, and Temperature
  • Ultra Compact Package: 24-Pin TSSOP PW