DLPU124
june 2023
1
Abstract
Trademarks
1
Overview
2
If You Need Assistance
3
DLP LightCrafter DLPC910 EVM (DLPLCRC910EVM) Overview
3.1
Welcome
3.2
DLP LightCrafter DLPC910 Evaluation Module (DLPLCRC910EVM) Hardware
3.3
DLPLCRC910EVM Board
3.4
Other Items Needed for Operation
3.5
DLPLCRC910EVM Connections
3.6
DLP LightCrafter DLPC910 LEDs
3.7
Apps FPGA Trigger Input
3.8
DLPLCRC910EVM HPC FMC Cables
3.9
DLPLCRC910EVM and DMD EVM Assembly
3.10
Connecting an Apps FPGA Board to the DLPLCRC910EVM
4
Quick Start
4.1
Power-up the DLPLCRC910EVM
4.2
Power-down the DLPLCRC910EVM
5
Operating the DLPLCRC910EVM
5.1
DLPLCRC910EVM GUI and Apps FPGA Software
5.2
PC Software
5.2.1
Menu Bar
5.2.2
Icon Bar
5.2.3
Main Window
5.2.3.1
Script Commands sub-window
5.2.3.1.1
Load Tab
5.2.3.1.2
Reset Tab
5.2.3.1.3
Clear Tab
5.2.3.1.4
Float Tab
5.2.3.1.5
Control Tab
5.2.3.2
Script Sub-Window
5.2.3.3
Status Sub-Window
5.2.4
DLPC910 Registers
5.2.4.1
Status/Control Tab
5.2.4.1.1
Status Items
5.2.4.1.2
DMD Control Items
5.2.4.1.3
Design Items
5.2.4.2
Register List Tab
5.2.4.2.1
DESTOP_INTERRUPT_CLEAR - 0x0000
5.2.4.2.2
DESTOP_INTERRUPT_SET - 0x0004
5.2.4.2.3
DESTOP_INTERRUPT_ENABLE - 0x0008
5.2.4.2.4
MAIN_STATUS (DLPC910) - 0x000C
5.2.4.2.5
DESTOP_CAL - 0x0010
5.2.4.2.6
DESTOP_DMD_ID_REG - 0x0014
5.2.4.2.7
DESTOP_CATBITS_REG - 0x0018
5.2.4.2.8
DESTOP_910VERSION_REG - 0x001C
5.2.4.2.9
DESTOP_RESET_REG - 0x0020
5.2.4.2.10
DESTOP_INFIFO_STATUS - 0x0024
5.2.4.2.11
DESTOP_BUS_SWAP - 0x0028
5.2.4.2.12
DESTOP_DMDCTRL - 0x002C
5.2.4.2.13
DESTOP_BIT_FLIP - 0x0030
5.2.4.3
Settings Tab
5.2.5
Apps FPGA Registers
5.2.5.1
Status/Control Tab
5.2.5.1.1
Status Items
5.2.5.1.2
PBC Control Items
5.2.5.1.3
Row/Block Operations Items
5.2.5.1.4
Test Pattern Items
5.2.5.2
Apps Registers Tab
5.2.5.2.1
APPS_INTERRUPT_CLEAR - 0x0000
5.2.5.2.2
APPS_INTERRUPT_SET - 0x0004
5.2.5.2.3
APPS_INTERRUPT_ENABLE - 0x0008
5.2.5.2.4
MAIN_STATUS (Apps) - 0x000C
5.2.5.2.5
APPS_CNTRL - 0x0010
5.2.5.2.6
APPSTOP_PATTERNSEL - 0x0014
5.2.5.2.7
APPSTOP_TEST_ROWADDR - 0x0018
5.2.5.2.8
APPSTOP_LOADER_RESET_TYPE - 0x001C
5.2.5.2.9
DMD_TYPEREG - 0x0020
5.2.5.2.10
APPS_BUFFER_WSTART - 0x0024
5.2.5.2.11
APPS_FIFO_BURST - 0x0028
5.2.5.2.12
APPS_ROW_CTRL - 0x002C
5.2.5.2.13
APPS_BLK_CTRL - 0x0030
5.2.5.2.14
APPS_ROW_LOADER - 0x0034
5.2.5.2.15
APPS_LOAD_TRIG_INTERVAL - 0x0038
5.2.5.2.16
APPS_EXPOSE_TIME - 0x003C
5.2.5.2.17
APPS_LOADER_CTRL - 0x0040
5.2.5.2.18
APPS_DMD_PARK - 0x0044
5.2.5.2.19
APPS_EXT_RST_EVT - 0x0048
5.2.5.2.20
APPS_BUILD_DATE - 0x0080
5.2.5.2.21
APPS_VERSION - 0x0084
5.2.5.2.22
APPS_FIXED_ID - 0x0088
5.2.5.2.23
APPS_GPIF_TEST - 0x008C
5.3
JTAG Flash Programming
5.4
SPI Flash Programming
5.5
AMD Xilinx VC-707 Configuration PROM Programming
5.6
USB Firmware Programming
6
Connectors
6.1
J1 - USB - Micro B USB 2.0 Connector
6.2
J2 - DLPC910 I2C Connector
6.3
J4 - PMBUS (I2C) Connector
6.4
J6 - USB GPIO Connector
6.5
J8 - 400 Position FMC Connector (Female)
6.6
J14 - Power (Alternate)
6.7
J15 - Power
6.8
J17 - JTAG Boundary Scan Connector
6.9
J18 - SPI Programming Connector
6.10
J19, J20, and J21 - Fan Connectors
6.11
J500, J501 - FMC Connector (Male)
7
DLPLCRC910EVM Power Supply Requirements
7.1
External Power Supply Requirements
8
Related Documentation from Texas Instruments
9
Abbreviations and Acronyms
10
Safety
10.1
Caution Labels
5.2.4.2.6
DESTOP_DMD_ID_REG
- 0x0014
Read DMD ID information
Table 5-6 DESTOP_DMD_ID_REG Definition
ADDRESS
BITS
DESCRIPTION
TYPE
DEFAULT
0x0014
3:0
destop_dmd_id
R
read from firmware
5 = DLP6500FLQ DMD
10 = DLP9000X DMD or DLP9000XUV DMD