JAJS116J December 2003 – June 2022 TPS40054 , TPS40055 , TPS40057
PRODUCTION DATA
The TPS4005x uses a two-tier approach for overcurrent protection. The first tier is a pulse-by-pulse protection scheme. Current limit is implemented on the high-side MOSFET by sensing the voltage drop across the MOSFET when the gate is driven high. The MOSFET voltage is compared to the voltage dropped across a resistor connected from VIN pin to the ILIM pin when driven by a constant current sink. If the voltage drop across the MOSFET exceeds the voltage drop across the ILIM resistor, the switching pulse is immediately terminated. The MOSFET remains off until the next switching cycle is initiated.
The second tier consists of a fault counter. The fault counter is incremented on an overcurrent pulse and decremented on a clock cycle without an overcurrent pulse. When the counter reaches seven, a restart is issued and seven soft-start cycles are initiated. Both the upper and lower MOSFETs are turned off during this period. The counter is decremented on each soft-start cycle. When the counter is decremented to zero, the PWM is re-enabled. If the fault has been removed, the output starts up normally. If the output is still present, the counter counts seven overcurrent pulses and re-enters the second-tier fault mode. See Figure 7-4 for typical overcurrent protection waveforms.
The minimum current limit setpoint (IILIM) is calculated in Equation 7.
where
The current limit programming resistor (RILIM) is calculated using Equation 8. Care must be taken in choosing the values used for VOS and ISINK in the equation. To ensure the output current at the overcurrent level, the minimum value of ISINK and the maximum value of VOS must be used. The main purpose is hard fault protection of the power switches.
where