12.1 Layout Guidelines

Figure 56 shows a board layout example for the ADS833x with the VQFN package. Use a ground plane underneath the device and partition the PCB into analog and digital sections. Avoid crossing digital lines with the analog signal path and keep the analog input signals and the reference input signals away from noise sources. As shown in Figure 56, the analog input and reference signals are routed on the left side of the board and the digital connections are routed on the right side of the device.

The power sources to the device must be clean and well-bypassed. Use 10 μF, ceramic bypass capacitors in close proximity to the analog (VA) and digital (VBD) power-supply pins. Avoid placing vias between the AVDD and DVDD pins and the bypass capacitors. Connect all ground pins to the ground plane using short, low impedance paths.

The REF+ reference input is bypassed with a 22 μF, X7S-grade, 0805-size, 10-V rated ceramic capacitors. Place the reference bypass capacitor as close as possible to the reference REF+ and REF- pins and connect the bypass capacitor using short, low-inductance connections. Avoid placing vias between the REF+ and REF- pins and the bypass capacitor. If the reference voltage originates from an op amp, make sure that the op amp can drive the bypass capacitor without oscillation. A small 0.2-Ω to 0.5-Ω resistors (R_REF) is used in series with the reference bypass capacitor to improve stability.

The fly-wheel RC filters are placed immediately next to the input pins. For applications measuring AC signals, COG (NPO) ceramic capacitors provide the best capacitance precision. Figure 56 shows input filter capacitors placed in close proximity to the INx analog input pins of the device.

12.2 Layout Example