JAJSCL6A November   2016  – January 2022 UCC20520

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety-Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Propagation Delay and Pulse Width Distortion
    2. 7.2 Rising and Falling Time
    3. 7.3 PWM Input and Disable Response Time
    4. 7.4 Programable Dead Time
    5. 7.5 CMTI Testing
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VDD, VCCI, and Under Voltage Lock Out (UVLO)
      2. 8.3.2 Input and Output Logic Table
      3. 8.3.3 Input Stage
      4. 8.3.4 Output Stage
      5. 8.3.5 Diode Structure in UCC20520
    4. 8.4 Device Functional Modes
      1. 8.4.1 Disable Pin
      2. 8.4.2 Programmable Dead Time (DT) Pin
        1. 8.4.2.1 Tying the DT Pin to VCC
        2. 8.4.2.2 DT Pin Left Open or Connected to a Programming Resistor between DT and GND Pins
        3. 8.4.2.3 39
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Designing PWM Input Filter
        2. 9.2.2.2 Select External Bootstrap Diode and its Series Resistor
        3. 9.2.2.3 Gate Driver Output Resistor
        4. 9.2.2.4 Estimate Gate Driver Power Loss
        5. 9.2.2.5 Estimating Junction Temperature
        6. 9.2.2.6 Selecting VCCI, VDDA/B Capacitor
          1. 9.2.2.6.1 Selecting a VCCI Capacitor
          2. 9.2.2.6.2 Selecting a VDDA (Bootstrap) Capacitor
          3. 9.2.2.6.3 Select a VDDB Capacitor
        7. 9.2.2.7 Dead Time Setting Guidelines
        8. 9.2.2.8 Application Circuits with Output Stage Negative Bias
        9. 9.2.2.9 56
      3. 9.2.3 Application Curves
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
      1. 11.3.1 Certifications
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary

Typical Characteristics

VDDA = VDDB= 12 V, VCCI = 3.3 V, TA = 25°C, No load unless otherwise noted.

GUID-7EB1668B-2900-4653-AE43-CE51C1FD0002-low.gif
No load
Figure 6-4 Per Channel Current Consumption vs. Frequency
GUID-707C6271-E5A7-4CAD-87B9-58CADD49CA8B-low.gif
CLOAD = 10 nF
Figure 6-6 Per Channel Current Consumption (IVDDA/B) vs. Frequency
GUID-3CA99BF4-A386-48FF-B641-CBCE792188EF-low.gif
No load Input low No switching
Figure 6-8 Per Channel (IVDDA/B) Quiescent Supply Current vs Temperature
GUID-5AB3A7AE-C432-4139-8B0C-29F86A385FCD-low.gif
VDD = 12 V
Figure 6-10 Rising and Falling Times vs. Load
GUID-CD90CB71-91B4-46B1-B657-3F8E65F52EB8-low.gifFigure 6-12 Propagation Delay vs. Temperature
GUID-A853C500-8421-4072-905D-24732854F47F-low.gifFigure 6-14 Pulse Width Distortion vs. Temperature
GUID-0B87720F-8A64-40FC-AFC9-D203DA631198-low.gifFigure 6-16 Propagation Delay Matching (tDM) vs. Temperature
GUID-9F2AC1E7-D2DB-48B6-BBBE-605DD3FF85E8-low.gifFigure 6-18 VDD UVLO Threshold vs. Temperature
GUID-665D0494-BB4C-492D-863B-CDEF64FFC04C-low.gifFigure 6-20 PWM/DIS Low Threshold
GUID-8CBF6142-44F1-4E82-9F0F-3057AA63C3EE-low.gifFigure 6-22 Dead Time vs. Temperature
GUID-2AA51C59-083E-474A-A495-A0671403EF5A-low.gifFigure 6-24 Typical Output Voltage
GUID-693E9ECB-F4C4-4ED7-8501-51FB53CB3628-low.gif
CLOAD = 1 nF
Figure 6-5 Per Channel Current Consumption (IVDDA/B) vs. Frequency
GUID-6D27E1DF-7201-48B9-AD96-7C68BC255E4A-low.gif
No load
Figure 6-7 Per Channel (IVDDA/B) Supply Current Vs. Temperature
GUID-3B962825-9B0F-4022-8F5C-DF92F350768A-low.gif
No load DIS is high No switching
Figure 6-9 IVCCI Quiescent Supply Current vs Temperature
GUID-0D432C31-B541-4311-A2AF-73A5D666E38C-low.gifFigure 6-11 Output Resistance vs. Temperature
GUID-107B703F-74EB-4D6A-A4A1-5342AC00C225-low.gifFigure 6-13 Propagation Delay vs. VCCI
GUID-06E215B2-8158-469E-B7AF-BF1B829565AF-low.gifFigure 6-15 Propagation Delay Matching (tDM) vs. VDD
GUID-DA83523C-A178-46DC-9C75-C50C0E1C5545-low.gifFigure 6-17 VDD UVLO Hysteresis vs. Temperature
GUID-5EEC6B3A-7BCC-4D87-B2BD-B71EB938BEC3-low.gifFigure 6-19 PWM/DIS Hysteresis vs. Temperature
GUID-88A87A1A-CC15-4AE6-99B5-164F6EECF52F-low.gifFigure 6-21 PWM/DIS High Threshold
GUID-8F93F44E-F172-499E-9BB6-DDEDBE5C9C24-low.gifFigure 6-23 Dead Time Matching vs. Temperature