JAJSCS2B July 2016 – June 2018 SN65DSI85-Q1
PRODUCTION DATA.
Address 0x26 is shown in Figure 37 and described in Table 26.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CHB_VERTICAL_DISPLAY_SIZE_LOW | |||||||
R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; W = Write only (reads return undetermined values); R/W1C = Read and Write 1 to Clear |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
7-0 | CHB_VERTICAL_DISPLAY_SIZE_LOW | R/W | 0 | TEST PATTERN GENERATION PURPOSE ONLY.
This field controls the vertical display size in lines for LVDS Channel B test pattern generation. The value in this field is the lower 8 bits of the 12-bit value for the vertical display size. This field is only applicable when CSR 0x10.6:5 = 10 |