JAJSCW4C december   2016  – september 2020 CC2640R2F

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Functional Block Diagram
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Pin Diagram – RHB Package
    4. 7.4 Signal Descriptions – RHB Package
    5. 7.5 Pin Diagram – YFV (Chip Scale, DSBGA) Package
    6. 7.6 Signal Descriptions – YFV (Chip Scale, DSBGA) Package
    7. 7.7 Pin Diagram – RSM Package
    8. 7.8 Signal Descriptions – RSM Package
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Consumption Summary
    5. 8.5  General Characteristics
    6. 8.6  125-kbps Coded (Bluetooth 5) – RX
    7. 8.7  125-kbps Coded (Bluetooth 5) – TX
    8. 8.8  500-kbps Coded (Bluetooth 5) – RX
    9. 8.9  500-kbps Coded (Bluetooth 5) – TX
    10. 8.10 1-Mbps GFSK (Bluetooth low energy) – RX
    11. 8.11 1-Mbps GFSK (Bluetooth low energy) – TX
    12. 8.12 2-Mbps GFSK (Bluetooth 5) – RX
    13. 8.13 2-Mbps GFSK (Bluetooth 5) – TX
    14. 8.14 24-MHz Crystal Oscillator (XOSC_HF)
    15. 8.15 32.768-kHz Crystal Oscillator (XOSC_LF)
    16. 8.16 48-MHz RC Oscillator (RCOSC_HF)
    17. 8.17 32-kHz RC Oscillator (RCOSC_LF)
    18. 8.18 ADC Characteristics
    19. 8.19 Temperature Sensor
    20. 8.20 Battery Monitor
    21. 8.21 Continuous Time Comparator
    22. 8.22 Low-Power Clocked Comparator
    23. 8.23 Programmable Current Source
    24. 8.24 Synchronous Serial Interface (SSI)
    25. 8.25 DC Characteristics
    26. 8.26 Thermal Resistance Characteristics
    27. 8.27 Timing Requirements
    28. 8.28 Switching Characteristics
    29. 8.29 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  Functional Block Diagram
    3. 9.3  Main CPU
    4. 9.4  RF Core
    5. 9.5  Sensor Controller
    6. 9.6  Memory
    7. 9.7  Debug
    8. 9.8  Power Management
    9. 9.9  Clock Systems
    10. 9.10 General Peripherals and Modules
    11. 9.11 Voltage Supply Domains
    12. 9.12 System Architecture
  10. 10Application, Implementation, and Layout
    1. 10.1 Application Information
    2. 10.2 5 × 5 External Differential (5XD) Application Circuit
      1. 10.2.1 Layout
    3. 10.3 4 × 4 External Single-ended (4XS) Application Circuit
      1. 10.3.1 Layout
  11. 11Device and Documentation Support
    1. 11.1  Device Nomenclature
    2. 11.2  Tools and Software
    3. 11.3  Documentation Support
    4. 11.4  Texas Instruments Low-Power RF Website
    5. 11.5  Low-Power RF eNewsletter
    6. 11.6  サポート・リソース
    7. 11.7  Trademarks
    8. 11.8  静電気放電に関する注意事項
    9. 11.9  Export Control Notice
    10. 11.10 用語集
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MINMAXUNIT
Supply voltage (VDDS, VDDS2, and VDDS3)VDDR supplied by internal DC/DC regulator or internal GLDO. VDDS_DCDC connected to VDDS on PCB–0.34.1V
Supply voltage (VDDS(3) and VDDR)External regulator mode (VDDS and VDDR pins connected on PCB)–0.32.25V
Voltage on any digital pin(4)(5)–0.3VDDSx + 0.3, max 4.1V
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P–0.3VDDR + 0.3, max 2.25V
Voltage on ADC input (Vin)Voltage scaling enabled–0.3VDDSV
Voltage scaling disabled, internal reference–0.31.49
Voltage scaling disabled, VDDS as reference–0.3VDDS / 2.9
Input RF level5dBm
TstgStorage temperature–40150°C
(1) All voltage values are with respect to ground, unless otherwise noted.
(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(3) In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS.
(4) Including analog-capable DIO.
(5) Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 9-3.