JAJSDF7A January 2017 – May 2017 LMK61E0M
PRODUCTION DATA.
The SLAVEADR register reflects the 7-bit I2C Slave Address value initialized from from on-chip EEPROM.
BIT NO. | FIELD | TYPE | RESET | EEPROM | DESCRIPTION | |
---|---|---|---|---|---|---|
[7:1] | SLAVEADR[7:1] | R | 0x58 | Y | I2C Slave Address. This field holds the 7-bit Slave Address used to identify this device during I2C transactions. The two least significant bits of the address can be configured using ADD pin as shown. | |
SLAVEADR[2:1] | ADD pin | |||||
0 (0x0) | 0 | |||||
1 (0x1) | Float | |||||
3 (0x3) | 1 | |||||
[0] | RESERVED | - | - | N | Reserved. |