JAJSDF7A January 2017 – May 2017 LMK61E0M
PRODUCTION DATA.
The 22-bit Fractional Divider Denominator value for PLL is set by registers PLL_FRACDEN_BY2, PLL_FRACDEN_BY1 and PLL_FRACDEN_BY0.
BIT NO. | FIELD | TYPE | RESET | EEPROM | DESCRIPTION |
---|---|---|---|---|---|
[7:6] | RESERVED | - | - | N | Reserved. |
[5:0] | PLL_DEN[21:16] | RW | 0x00 | Y | PLL Fractional Divider Denominator Byte 2. Bits [21:16]. |