JAJSDR6C August 2017 – February 2022 TIC12400-Q1
PRODUCTION DATA
The TIC12400-Q1 is designed to operate with a 12 V automotive system. Figure 9-1 depicts a typical system diagram to show how the device is connected to the battery. Remember to be careful when connecting the battery directly to the device on the VS supply pin (through a reverse-blocking diode) or the input (INX) pins since an automotive battery can be subjected to various transient and over-voltage events. Manufacturers have independently created standards and test procedures in an effort to prevent sensitive electronics from failing due to these events. Recently, combined efforts are made with ISO to develop the ISO 16750-2 standard (Road vehicles — Environmental conditions and testing for electrical and electronic equipment — Part 2: Electrical loads), which describe the possible transients that could occur to an automotive battery and specify test methods to simulate them.
It shall be noted that the TIC12400-Q1 is designed and tested according to the ISO 16750-2 standard. A few voltage stress tests and their test conditions are listed below. Exposing the device to more severe transient events than described by the standard could potentially causes performance degradation and long-term damage to the device.
Parameter | Value |
---|---|
VBAT, min | 10.8 V |
VBAT, max | 24 V |
tr | < 10 ms |
t1 | 60 s ± 6 s |
tf | < 10 ms |
Number of cycles | 1 |
Parameter | Value |
---|---|
UA | 13.5 V |
US | 79 V ≤ US ≤ 101 |
US* | 35 V |
td | 40 ms ≤ td ≤ 400 ms |
tr | < 10 ms |
Number of cycles | 5 pulses at intervals of 1 min |
Parameter | Value - Level I | Value - Level II | Value - Level IV |
---|---|---|---|
US6 | 8 V | 4.5 V | 6 V |
US | 9.5 V | 6.5 V | 6.5 V |
UB | 14 V ± 0.2 V | 14 V ± 0.2 V | 14 V ± 0.2 V |
tf | 5 ms ± 0.5 ms | 5 ms ± 0.5 ms | 5 ms ± 0.5 ms |
t6 | 15 ms ± 1.5 ms | 15 ms ± 1.5 ms | 15 ms ± 1.5 ms |
t7 | 50 ms ± 5 ms | 50 ms ± 5 ms | 50 ms ± 5 ms |
t8 | 1000 ms ± 100 ms | 10000 ms ± 1000 ms | 10000 ms ± 1000 ms |
tr | 40 ms ± 4 ms | 100 ms ± 10 ms | 100 ms ± 10 ms |