JAJSE13B October   2017  – July 2018 UCC21520-Q1

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

1. 1 特長
2. 2 アプリケーション
3. 3 概要
   1.     機能ブロック図
4. 4 改訂履歴
5. 5 概要（続き）
6. 6 Pin Configuration and Functions
   1.     Pin Functions
7. 7 Specifications
   1. 7.1  Absolute Maximum Ratings
   2. 7.2  ESD Ratings
   3. 7.3  Recommended Operating Conditions
   4. 7.4  Thermal Information
   5. 7.5  Power Ratings
   6. 7.6  Insulation Specifications
   7. 7.7  Safety-Related Certifications
   8. 7.8  Safety-Limiting Values
   9. 7.9  Electrical Characteristics
   10. 7.10 Switching Characteristics
   11. 7.11 Insulation Characteristics Curves
   12. 7.12 Typical Characteristics
8. 8 Parameter Measurement Information
   1. 8.1 Propagation Delay and Pulse Width Distortion
   2. 8.2 Rising and Falling Time
   3. 8.3 Input and Disable Response Time
   4. 8.4 Programable Dead Time
   5. 8.5 Power-up UVLO Delay to OUTPUT
   6. 8.6 CMTI Testing
9. 9 Detailed Description
   1. 9.1 Overview
   2. 9.2 Functional Block Diagram
   3. 9.3 Feature Description
      1. 9.3.1 VDD, VCCI, and Under Voltage Lock Out (UVLO)
      2. 9.3.2 Input and Output Logic Table
      3. 9.3.3 Input Stage
      4. 9.3.4 Output Stage
      5. 9.3.5 Diode Structure in the UCC21520-Q1
   4. 9.4 Device Functional Modes
      1. 9.4.1 Disable Pin
      2. 9.4.2 Programmable Dead Time (DT) Pin
         1. 9.4.2.1 Tying the DT Pin to VCC
         2. 9.4.2.2 DT Pin Left Open or Connected to a Programming Resistor between DT and GND Pins
10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
       1. 10.2.1 Design Requirements
       2. 10.2.2 Detailed Design Procedure
          1. 10.2.2.1 Designing INA/INB Input Filter
          2. 10.2.2.2 Select External Bootstrap Diode and its Series Resistor
          3. 10.2.2.3 Gate Driver Output Resistor
          4. 10.2.2.4 Estimate Gate Driver Power Loss
          5. 10.2.2.5 Estimating Junction Temperature
          6. 10.2.2.6 Selecting VCCI, VDDA/B Capacitor
             1. 10.2.2.6.1 Selecting a VCCI Capacitor
             2. 10.2.2.6.2 Selecting a VDDA (Bootstrap) Capacitor
             3. 10.2.2.6.3 Select a VDDB Capacitor
          7. 10.2.2.7 Dead Time Setting Guidelines
          8. 10.2.2.8 Application Circuits with Output Stage Negative Bias
       3. 10.2.3 Application Curves
11. 11Power Supply Recommendations
12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
       1. 13.1.1 関連資料
    2. 13.2 認定
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
14. 14メカニカル、パッケージ、および注文情報