11.1 Layout Guidelines
In general, the layout guidelines are similar to most other PLL devices. Here are some specific guidelines:
- GND pins may be routed on the package back to the DAP.
- The OSCin pins are internally biased and must be AC-coupled.
- The RampClk, RampDir, and SysRefReq can be grounded to the DAP if not used.
- Get a loop filter capacitor as close to the Vtune pin as possible to this. This may mean separating it from the rest of the loop filter.
- If a single-ended output is necessary, the other side must have the same loading. However, the routing for the used side can be optimized by routing the complementary side through a via to the other side of the board. On this side, make the load look equivalent to the side that is used.
- Ensure the DAP on the device is well-grounded with many vias, preferably copper filled.
- Have a thermal pad that is as large as the exposed pad. Add vias to the thermal pad to maximize thermal performance.
- Use a low loss dielectric material, such as Rogers 4003, for optimal output power.