JAJSE67C December   2017  – June 2022 AMC1311

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Switching Characteristics
    11. 7.11 Timing Diagram
    12. 7.12 Insulation Characteristics Curves
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Isolation Channel Signal Transmission
      3. 8.3.3 Analog Output
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Filter Design
        2. 9.2.2.2 Differential to Single-Ended Output Conversion
      3. 9.2.3 Application Curve
    3. 9.3 What To Do and What Not To Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7.9 Electrical Characteristics

minimum and maximum specifications of the AMC1311 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 = 0 V; minimum and maximum specifications of the AMC1311B apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 = 0 V (unless otherwise noted);  typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
VOS Input offset voltage(1)(2) TA = 25°C, 4.5 V ≤ VDD1 ≤ 5.5 V, AMC1311 –9.9 ±0.4 9.9 mV
TA = 25°C, AMC1311B(3) –1.5 ±0.4 1.5
TCVOS Input offset thermal drift(1)(2)(5) AMC1311 ±20 µV/°C
AMC1311B –10 ±3 10
RIN Input resistance TA = 25℃ 1 GΩ
IIB Input bias current IN = GND1, TA = 25℃ –15 3.5 15 nA
CIN Input capacitance fIN = 275 kHz 7 pF
ANALOG OUTPUT
Nominal gain 1 V/V
EG Gain error(1) TA = 25℃, AMC1311 –1% 0.4% 1%
TA = 25℃, AMC1311B –0.2% ±0.05% 0.2%
TCEG Gain error drift(1)(6) AMC1311 ±30 ppm/°C
AMC1311B –40 ±5 40
Nonlineartity(1) –0.04% ±0.01% 0.04%
THD Total harmonic distortion(4) VIN = 2 VPP, VIN > 0 V,
fIN = 10 kHz, BW = 10 kHz		 –87 dB
SNR Signal-to-noise ratio VIN = 2 VPP, fIN = 1 kHz, BW = 10 kHz 79 82.6 dB
VIN = 2 VPP, fIN = 10 kHz, BW = 100 kHz 70.9
Output noise VIN = GND1, BW = 100 kHz 220 µVrms
PSRR Power-supply rejection ratio(2) vs VDD1, at DC –80 dB
vs VDD2, at DC –85
vs VDD1, 10 kHz / 100-mV ripple –65
vs VDD2, 10 kHz / 100-mV ripple –70
VCMout Output common-mode voltage 1.39 1.44 1.49 V
VCLIPout Clipping differential output voltage VOUT = (VOUTP – VOUTN);
VIN > VClipping		 2.49 V
VFAILSAFE Failsafe differential output voltage SHTDN = high, or VDD1 undervoltage, or VDD1 missing –2.6 –2.5 V
BW Output bandwidth AMC1311 100 220 kHz
AMC1311B 220 275
ROUT Output resistance On OUTP or OUTN <0.2 Ω
Output short-circuit current On OUTP or OUTN, sourcing or sinking,
IN = GND1, outputs shorted to
either GND or VDD2		 14 mA
CMTI Common-mode transient immunity AMC1311 15 30 kV/µs
AMC1311B 100 150
DIGITAL INPUT
IIN Input current SHTDN pin, GND1 ≤ SHTDN ≤ VDD1 –70 1 µA
CIN Input capacitance SHTDN pin 5 pF
VIH High-level input voltage 0.7 × VDD1 V
VIL Low-level input voltage 0.3 × VDD1 V
POWER SUPPLY
VDD1UV VDD1 undervoltage detection threshold VDD1 rising 2.5 2.7 2.9 V
VDD1 falling  2.4 2.6 2.8
VDD2UV VDD2 undervoltage detection threshold VDD2 rising 2.2 2.45 2.65 V
VDD2 falling 1.85 2.0 2.2
IDD1 High-side supply current 3.0 V < VDD1 < 3.6 V, SHTDN = low,
AMC1311B only		 6.0 8.4 mA
4.5 V < VDD1 < 5.5 V, SHTDN = low 7.1 9.7
SHTDN = VDD1 1.3 µA
IDD2 Low-side supply current 3.0 V < VDD2 < 3.6 V 5.3 7.2 mA
4.5 V < VDD2 < 5.5 V 5.9 8.1
(1) The typical value includes one standard deviation (sigma) at nominal operating conditions.
(2) This parameter is input referred.
(3) The typical value is at VDD1 = 3.3 V.
(4) THD is the ratio of the rms sum of the amplitudes of first five higher harmonics to the amplitude of the fundamental.
(5) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCVOS = (ValueMAX - ValueMIN) / TempRange
(6) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = (ValueMAX - ValueMIN) / (Value(T=25℃) x TempRange) x 106