JAJSEL2D January   2018  – December 2019 TPS25221

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Over-current Conditions
      2. 9.3.2 Fault Response
      3. 9.3.3 Undervoltage Lockout (UVLO)
      4. 9.3.4 Enable, (EN)
      5. 9.3.5 Thermal Sense
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
      1. 9.5.1 Programming the Current-Limit Threshold
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Constant-Current
    2. 10.2 Typical Applications
      1. 10.2.1 Two-Level Current-Limit Circuit
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedures
          1. 10.2.1.2.1 Designing Above a Minimum Current Limit
          2. 10.2.1.2.2 Designing Below a Maximum Current Limit
          3. 10.2.1.2.3 Accounting for Resistor Tolerance
          4. 10.2.1.2.4 Input and Output Capacitance
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Auto-Retry Functionality
        1. 10.2.2.1 Design Requirements (added)
        2. 10.2.2.2 Detailed Design Procedure
      3. 10.2.3 Typical Application as USB Power Switch
        1. 10.2.3.1 Design Requirements
          1. 10.2.3.1.1 USB Power-Distribution Requirements
        2. 10.2.3.2 Detailed Design Procedure
          1. 10.2.3.2.1 Universal Serial Bus (USB) Power-Distribution Requirements
  11. 11Power Supply Recommendations
    1. 11.1 Self-Powered and Bus-Powered Hubs
    2. 11.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions
    3. 11.3 Power Dissipation and Junction Temperature
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

10.2.1 Two-Level Current-Limit Circuit

Some applications require different current-limit thresholds depending on external system conditions. Figure 25 shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is set by the total resistance from ILIM to GND (see the Programming the Current-Limit Threshold section). A logic-level input enables or disables MOSFET Q1 and changes the current-limit threshold by modifying the total resistance from ILIM to GND. Additional MOSFET and resistor combinations can be used in parallel to Q1/R2 to increase the number of additional current-limit levels.

NOTE

ILIM must never be driven directly with an external signal.
TPS25221 two_cur_limt_slvsdt3.gifFigure 25. Two-Level Current-Limit Circuit