JAJSER7D November   2018  – January 2019 LMG1210

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの概略図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
    8. 7.8 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bootstrap Diode Operation
      2. 8.3.2 LDO Operation
      3. 8.3.3 Dead Time Selection
      4. 8.3.4 Overtemperature Protection
      5. 8.3.5 High-Performance Level Shifter
      6. 8.3.6 Negative HS Voltage Handling
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bypass Capacitor
        2. 9.2.2.2 Bootstrap Diode Selection
        3. 9.2.2.3 Handling Ground Bounce
        4. 9.2.2.4 Independent Input Mode
        5. 9.2.2.5 Computing Power Dissipation
      3. 9.2.3 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

7.6 Switching Characteristics

VDD=5V, VHB-HS=4.6V, outputs unloaded over operating junction temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INDEPENDENT INPUT MODE
tPHL Turn-Off Delay 10 18 ns
tPLH Turn-On Delay 10 18 ns
tMTCH High-Off to Low-On and Low-Off to High-On Delay Mismatch Over temperature, TjHI=TjLO 1 3.4 ns
PWM INPUT MODE
tPHL Turn-Off Delay PWM rising to LO falling and PWM falling to HO falling 11 21 ns
tDEAD_MIN Minimum Dead Time Rext=1.78 MΩ -0.55 0.8 3.1 ns
tDEAD_MAX Maximum Dead Time Rext=20 kΩ 16 20 26 ns
tEN Enable Propagation Time 11 20 ns
OTHER CHARACTERISTICS
tOR Output Rise Time, Unloaded 10%-90% 0.5 ns
tOF Output Fall Time, Unloaded 90%-10% 0.5 ns
tORL Output Rise Time, Loaded CO=1nF, 10%-90% 3.5 5.6 ns
tOFL Output Fall Time, Loaded CO=1nF, 90%-10% 2.3 3.3 ns
tPW Minimum Input Pulse Width (1) Minimum input pulse width which changes the output 1.8 4.0 ns
tPW,ext H-L-H Pulse extender width (1) Unloaded(2) 4.5 10 ns
tSTLS Start-Up Time of low side after VDD-GND goes over UVLO threshold. Independent Control Mode 25 60 µs
PWM Control Mode 100 150 µs
tSTHS Start-Up Time of High-Side After VHB-VHS Goes Above UVLO 16 28 µs
tPWD Pulse-Width Distortion |tPLH-tPHL|, Independent Input Mode 1 3 ns
(1) Ensured by design
(2) Pulses longer than tPW, but shorter than tPW,ext get extended to tPW,ext