JAJSER7D November   2018  – January 2019 LMG1210

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーションの概略図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
    8. 7.8 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bootstrap Diode Operation
      2. 8.3.2 LDO Operation
      3. 8.3.3 Dead Time Selection
      4. 8.3.4 Overtemperature Protection
      5. 8.3.5 High-Performance Level Shifter
      6. 8.3.6 Negative HS Voltage Handling
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bypass Capacitor
        2. 9.2.2.2 Bootstrap Diode Selection
        3. 9.2.2.3 Handling Ground Bounce
        4. 9.2.2.4 Independent Input Mode
        5. 9.2.2.5 Computing Power Dissipation
      3. 9.2.3 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

9.2.2.3 Handling Ground Bounce

For the best switching performance, it is important to connect the VSS gate return to the source of the low-side FET with a very low-inductance path.

However, doing so can cause the ground of the LMG1210 to bounce relative to the system or controller ground and cause erroneous switching transitions on the inputs. Multiple strategies can be employed to eliminate these undesired transitions.

The LMG1210 has input hysteresis built into the input buffers to help counteract this effect, but this alone may not be sufficient in all applications. The simplest option is to tie the system ground together and the power ground only at the LMG1210 (single-point connection). This gives the cleanest solution but may not always be possible depending on system grounding requirements.

For moderate ground-bounce cases, a simple R-C filter can be built with a simple resistor in series with the inputs. The resistor should be close to the inputs of the LMG1210. The input capacitance of the LMG1210 produces an RC filter which can help decrease ringing at the inputs. The addition of a small C on the inputs to supplement the LMG1210 input capacitance can also be helpful. This solution is acceptable for moderate cases in applications where the extra delay is acceptable.

For more extreme cases or where no delay is tolerable, using a common-mode choke provides the best results. One example application where the ground bounce is particularly challenging is when using a current sense resistor. In this application, the LMG1210 ground is connected to the GaN source, while the controller ground is connected to the other side of the current sense resistor as shown in Figure 18.

LMG1210 lmg1210_current_sense_resistor_snosd12.gifFigure 18. LMG1210 Configured With Current Sense Resistor Using a CMC as Filter

The combination of high dI/dt experienced through the sense resistor inductance will cause severe ground noise that could cause false triggering or even damage the part. To prevent this, a common-mode choke (CMC) can be used. Each signal requires its own CMC. Also, to provide additional RC filtering, a 100 Ω resistor should be added to the signal output line before the LMG1210.