JAJSES4A February 2018 – April 2020 ADC08DJ3200
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | TMSTP_LVPECL_EN | TMSTP_RECV_EN | |||||
R/W-0000 00 | R/W-0 | R/W-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-2 | RESERVED | R/W | 0000 00 | RESERVED |
1 | TMSTP_LVPECL_EN | R/W | 0 | When set, this bit activates the low-voltage PECL mode for the differential TMSTP± input. |
0 | TMSTP_RECV_EN | R/W | 0 | This bit enables the differential TMSTP± input. |