JAJSES4A February 2018 – April 2020 ADC08DJ3200
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | CAL_EN | ||||||
R/W-0000 000 | R/W-1 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | RESERVED | R/W | 0000 000 | RESERVED |
0 | CAL_EN | R/W | 1 | Calibration enable. Set this bit high to run calibration. Set this bit low to hold the calibration in reset to program new calibration settings. Clearing CAL_EN also resets the clock dividers that clock the digital block and JESD204B interface.
Some calibration registers require clearing CAL_EN before making any changes. All registers with this requirement contain a note in their descriptions. After changing the registers, set CAL_EN to re-run calibration with the new settings. Always set CAL_EN before setting JESD_EN. Always clear JESD_EN before clearing CAL_EN. |