TPS7A54-Q1デバイスは低ノイズ(4.4µVRMS)、低ドロップアウトのリニア・レギュレータ(LDO)で、4Aを供給でき、ドロップアウトは最大でわずか240mVです。デバイスの出力電圧は、外付けの分圧抵抗によって0.8V~5.1Vの範囲で調整可能です。
低ノイズ(4.4µVRMS)、高PSRR、大出力電流の能力の組み合わせにより、TPS7A54-Q1はレーダーの電源やインフォテイメント・アプリケーションなどに使用される、電力ノイズに敏感な部品への電源供給に理想的です。このデバイスは高性能で、電源によって生成される位相ノイズとクロック・ジッタを制限するため、RFアンプ、レーダー・センサ、チップセットの電源として理想的です。特に、RFアンプにはこのデバイスの高い性能と5.0V出力能力が役立ちます。
ASIC (Application-Specific Integrated Circuit)、FPGA (Field-Programmable Gate Array)、DSP (Digital Signal Processor)などのデジタル負荷で低入力電圧、低出力(LILO)電圧の動作を必要とする場合、TPS7A54-Q1の非常に優れた精度(負荷および温度範囲にわたって1%)、リモート・センシング、優れた過渡性能、ソフトスタート機能によって、最適のシステム性能が保証されます。
多用途なTPS7A54-Q1デバイスは、要求の厳しい多くのアプリケーションの部品として最適な選択肢です。
型番 | パッケージ | 本体サイズ(公称) |
---|---|---|
TPS7A54-Q1 | VQFN (20) | 3.50mm×3.50mm |
PIN | DESCRIPTION | ||
---|---|---|---|
NAME | NO. | I/O | |
BIAS | 12 | I | BIAS supply voltage. This pin enables the use of low-input voltage, low-output (LILO) voltage conditions (that is, VIN = 1.2 V, VOUT = 1 V) to reduce power dissipation across the die. The use of a BIAS voltage improves dc and ac performance for VIN ≤ 2.2 V. A 10-µF capacitor or larger must be connected between this pin and ground. If not used, this pin must be left floating or tied to ground. |
DNC | 5 | Do not connect | |
EN | 14 | I | Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. If enable functionality is not required, this pin must be connected to IN or BIAS. |
FB | 3 | I | Feedback pin connected to the error amplifier. Although not required, a 10-nF feed-forward capacitor from FB to OUT (as close to the device as possible) is recommended to maximize ac performance. The use of a feed-forward capacitor can disrupt PG (power good) functionality. |
GND | 8, 18 | — | Ground pin. These pins must be connected to ground, the thermal pad, and each other with a low-impedance connection. |
IN | 15-17 | I | Input supply voltage pin. A 10-µF or larger ceramic capacitor (5 µF or greater of capacitance) from IN to ground is recommended to reduce the impedance of the input supply. Place the input capacitor as close to the input as possible. |
NC | 2, 6, 7, 9, 10, 11 | No internal connection | |
NR/SS | 13 | — | Noise-reduction and soft-start pin. Connecting an external capacitor between this pin and ground reduces reference voltage noise and also enables the soft-start function. Although not required, a 10-nF or larger capacitor is recommended to be connected from NR/SS to GND (as close to the pin as possible) to maximize ac performance. |
OUT | 1, 19, 20 | O | Regulated output pin. A 47-µF or larger ceramic capacitor (25 µF or greater of capacitance) from OUT to ground is required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT pin to the load. |
PG | 4 | O | Active-high, power-good pin. An open-drain output indicates when the output voltage reaches VIT(PG) of the target. The use of a feed-forward capacitor may disrupt PG (power good) functionality. |
Thermal pad | — | Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND. |