JAJSF47A April   2018  – May 2018 UCC28742

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
      2.      10W、5VのAC/DCコンバータの標準的な効率
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 VS (Voltage-Sense)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CS (Current Sense)
        6. 7.3.1.6 FB (Feedback)
      2. 7.3.2 Secondary-Side Optically Coupled Constant-Voltage (CV) Regulation
      3. 7.3.3 Control Law
      4. 7.3.4 Constant Current Limit and Delayed Shutdown
      5. 7.3.5 Valley-Switching and Valley-Skipping
      6. 7.3.6 Start-Up Operation
      7. 7.3.7 Fault Protection
    4. 7.4 Device Functional Modes
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  VDD Capacitance, CDD
        3. 8.2.2.3  VDD Start-Up Resistance, RSTR
        4. 8.2.2.4  Input Bulk Capacitance and Minimum Bulk Voltage
        5. 8.2.2.5  Transformer Turns Ratio, Inductance, Primary-Peak Current
        6. 8.2.2.6  Transformer Parameter Verification
        7. 8.2.2.7  VS Resistor Divider and Line Compensation
        8. 8.2.2.8  Standby Power Estimate
        9. 8.2.2.9  Output Capacitance
        10. 8.2.2.10 Feedback Loop Design Consideration
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 WEBENCH®ツールによるカスタム設計
      2. 11.1.2 デバイスの項目表記
        1. 11.1.2.1  容量項(ファラッド単位)
        2. 11.1.2.2  デューティ・サイクル項
        3. 11.1.2.3  周波数項(ヘルツ単位)
        4. 11.1.2.4  電流項(アンペア単位)
        5. 11.1.2.5  電流および電圧のスケーリング項
        6. 11.1.2.6  変圧器の項
        7. 11.1.2.7  電力項(ワット単位)
        8. 11.1.2.8  抵抗項(オーム単位)
        9. 11.1.2.9  タイミング項(秒単位)
        10. 11.1.2.10 電圧項(ボルト単位)
        11. 11.1.2.11 AC電圧項(VRMS単位)
        12. 11.1.2.12 効率項
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

Device Functional Modes

The UCC28742 operates in different modes according to input voltage, VDD voltage, and output load conditions:

  • At start-up, when VDD is less than the turn-on threshold, VVDD(on) , the device is simply waiting for VDD to reach this threshold while the VDD capacitor is getting charged.
  • When VDD exceeds VVDD(on), the device starts switching to deliver power to the converter output. The initial 3 switching cycles control the primary-peak current to IPP(min). This allows sensing any initial input or output faults with minimal power delivery. When confirmed with input voltage above predetermined level and no fault conditions, start up process proceeds and normal power conversion follows. The converter will remain in discontinuous current mode operation during charging of the output capacitor(s), maintaining a constant output current, IOCC, until the output voltage reaches its regulation point. The maximum time duration when IO stays on IOCC can only last 120 ms, and when 120-ms timer out, the device will initiate shutdown. Therefore, a design needs to make sure the maximum time when output current reaches and stays on IOCC does not exceed 120 ms during start. For more details refer to Constant Current Limit and Delayed Shutdown
  • When operating with IPP = IPP(max), the UCC28742 operates continuously in the run state. In this state, the VDD bias current is always at IRUN plus the average gate-drive current.
  • When operating with IPP < IPP(max), the UCC28742 operates in the wait state between switching cycles and in the run state during a switching cycle. In the wait state, the VDD bias current is reduced to IWAIT after demagnetizing time of each switching cycle to improve efficiency at light loads. This helps reduce no-load to medium-load power losses, particularly for achieving higher efficiency at 10%, 25% load conditions, and possible at < 50% load conditions, depending on a design.
  • The device operation will stop if any events occur as listed below:
    • If VDD drops below the VVDD(off) threshold, the device stops switching, its bias current consumption is lowered to ISTART until VDD rises above the VVDD(on) threshold. The device then resumes operation through start-up.
    • If a fault condition is detected, the device stops switching and its bias current consumption becomes IFAULT. This current level discharges VDD to VVDD(off) where the bias current changes from IFAULT to ISTART until VDD rises above the VVDD(on) threshold.
  • If a fault condition persists, the operation sequence described above in repeats until the fault condition or the input voltage is removed. Refer to Fault Protection for fault conditions and post-fault operation.