JAJSF63D April   2018  – September 2020 LMR36015

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 System Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-Good Flag Output
      2. 9.3.2 Enable and Start-up
      3. 9.3.3 Current Limit and Short Circuit
      4. 9.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Auto Mode
      2. 9.4.2 Forced PWM Operation
      3. 9.4.3 Dropout
      4. 9.4.4 Minimum Switch On-Time
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Low Power 24-V, 1.5-A PFM Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1  Custom Design With WEBENCH Tools
          2. 10.2.1.2.2  Choosing the Switching Frequency
          3. 10.2.1.2.3  Setting the Output Voltage
          4. 10.2.1.2.4  Inductor Selection
          5. 10.2.1.2.5  Output Capacitor Selection
          6. 10.2.1.2.6  Input Capacitor Selection
          7. 10.2.1.2.7  CBOOT
          8. 10.2.1.2.8  VCC
          9. 10.2.1.2.9  CFF Selection
            1. 10.2.1.2.9.1 External UVLO
          10. 10.2.1.2.10 Maximum Ambient Temperature
      2. 10.2.2 Application Curves
      3. 10.2.3 Design 2: High Density 24-V, 1.5-A FPWM Converter
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
        1. 13.1.1.1 Custom Design With WEBENCH® Tools
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

9.1 Overview

The LMR36015 is a synchronous peak-current-mode buck regulator designed for a wide variety of industrial applications. The regulator automatically switches modes between PFM and PWM, depending on load. At heavy loads, the device operates in PWM at a constant switching frequency. At light loads, the mode changes to PFMW with diode emulation allowing DCM. This reduces the input supply current and keeps efficiency high. The device features internal loop compensation which reduces design time and requires fewer external components than externally compensated regulators.

The LMR36015 is designed with a flip-chip or HotRod technology, greatly reducing the parasitic inductance of pins. In addition, the layout of the device allows for reduction in the radiated noise generated by the switching action through partial cancellation of the current generated magnetic field. As a result the switch-node waveform exhibits less overshoot and ringing.

GUID-A1B25568-8B9C-4788-951D-66D962AED2E6-low.gifFigure 9-1 Switch Node Waveform