JAJSFA5E September 2015 – April 2018 LMK03318
PRODUCTION DATA.
Status CMOS Output Mute Control
Bit # | Field | Type | Reset | EEPROM | Description |
---|---|---|---|---|---|
[7:2] | RSRVD | - | - | N | Reserved. |
[1] | STATUS1_MUTE | RW | 1 | Y | STATUS 1 Mute Control. When the STATUS1 output is configuted to provide a CMOS Clock and the STATUS1_MUTE bit is set to 1 then the STATUS1 Output is automatically disabled when the selected clock source is invalid. When STATUS1_MUTE is 0 the STATUS1 Output will continue to operate regardless of the state of the selected clock source. If the STATUS1 output is not configured to provide a Clock then it will continue to operate regardless of the STATUS1_MUTE bit value. |
[0] | STATUS0_MUTE | RW | 0 | Y | STATUS 0 Mute Control. When the STATUS0 output is configuted to provide a CMOS Clock and the STATUS0_MUTE bit is set to 1 then the STATUS0 Output is automatically disabled when the selected clock source is invalid. When STATUS0_MUTE is 0 the STATUS0 Output will continue to operate regardless of the state of the selected clock source. If the STATUS0 output is not configured to provide a Clock then it will continue to operate regardless of the STATUS0_MUTE bit value. |