JAJSFA5E September 2015 – April 2018 LMK03318
PRODUCTION DATA.
Status CMOS Output Slew Control
Bit # | Field | Type | Reset | EEPROM | Description | |
---|---|---|---|---|---|---|
[7:4] | RSRVD | - | - | N | Reserved. | |
[3:2] | STATUS1SLEW[1:0] | RW | 0x0 | Y | STATUS1 Slew Control. The STATUS1SLEW field controls the slew rate of the STATUS1 output as shown below. | |
STATUS1SLEW | STATUS1 Rise/Fall Time | |||||
0 (0x0) | Fast (0.35 ns) | |||||
1 (0x1) | RESERVED | |||||
2 (0x2) | Slow (2.1 ns) | |||||
3 (0x3) | RESERVED | |||||
[1:0] | STATUS0SLEW[1:0] | RW | 0x0 | Y | STATUS0 Slew Control. The STATUS0SLEW field controls the slew rate of the STATUS0 output as shown below. | |
STATUS0SLEW | STATUS0 Rise/Fall Time | |||||
0 (0x0) | Fast (0.35 ns) | |||||
1 (0x1) | RESERVED | |||||
2 (0x2) | Slow (2.1 ns) | |||||
3 (0x3) | RESERVED |