JAJSFB6D April   2018  – July 2022 INA180-Q1 , INA2180-Q1 , INA4180-Q1

PRODMIX  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 High Bandwidth and Slew Rate
      2. 8.3.2 Wide Input Common-Mode Voltage Range
      3. 8.3.3 Precise Low-Side Current Sensing
      4. 8.3.4 Rail-to-Rail Output Swing
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Input Differential Overload
      3. 8.4.3 Shutdown Mode
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 RSENSE and Device Gain Selection
      3. 9.1.3 Signal Filtering
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Common-Mode Transients Greater Than 26 V
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
      1.      Mechanical, Packaging, and Orderable Information

Electrical Characteristics

at TA = 25°C, VS = 5 V, VIN+ = 12 V, and VSENSE = VIN+ – VIN– (unless otherwise noted)
PARAMETERCONDITIONSMINTYPMAXUNIT
INPUT
CMRRCommon-mode rejection ratio, RTI(1)VIN+ = 0 V to 26 V, VSENSE = 10 mV,
TA = –40°C to +125°C
84100dB
VOSOffset voltage(2), RTI±100±500μV
VIN+ = 0 V±25±150
dVOS/dTOffset drift, RTITA = –40°C to +125°C0.21μV/°C
PSRRPower-supply rejection ratio, RTIVS = 2.7 V to 5.5 V, VSENSE = 10 mV±8±40μV/V
IIBInput bias currentVSENSE = 0 mV, VIN+ = 0 V0.1µA
VSENSE = 0 mV80
IIOInput offset currentVSENSE = 0 mV±0.05µA
OUTPUT
GGainA1 devices20V/V
A2 devices50
A3 devices100
A4 devices200
EGGain errorVOUT = 0.5 V to VS – 0.5 V,
TA = –40°C to +125°C
±0.1%±1%
Gain error vs temperatureTA = –40°C to +125°C1.520ppm/°C
Nonlinearity errorVOUT = 0.5 V to VS – 0.5 V±0.01%
Maximum capacitive loadNo sustained oscillation1nF
VOLTAGE OUTPUT(3)
VSPSwing to VS power-supply rail(4)RL = 10 kΩ to GND, TA = –40°C to +125°C(VS) – 0.02(VS) – 0.03V
VSNSwing to GND(4)RL = 10 kΩ to GND, TA = –40°C to +125°C(VGND) + 0.0005(VGND) + 0.005V
FREQUENCY RESPONSE
BWBandwidthA1 devices, CLOAD = 10 pF350kHz
A2 devices, CLOAD = 10 pF210
A3 devices, CLOAD = 10 pF150
A4 devices, CLOAD = 10 pF105
SRSlew rate2V/µs
NOISE, RTI
Voltage noise density40nV/√ Hz
POWER SUPPLY
IQQuiescent currentINA180-Q1VSENSE = 10 mV197260µA
VSENSE = 10 mV, TA = –40°C to +125°C300
INA2180-Q1VSENSE = 10 mV355500
VSENSE = 10 mV, TA = –40°C to +125°C520
INA4180-Q1VSENSE = 10 mV690900
VSENSE = 10 mV, TA = –40°C to +125°C1000
RTI = referred-to-input.
Offset voltage is obtained by linear extrapolation to VSENSE = 0 V with VSENSE = 10% to 90% of full-scale-range.
See Figure 7-19.
Swing specifications are tested with an overdriven input condition.