JAJSFM8B June   2018  – May 2019 LMZM33606

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     概略回路図
  3. 3 概要
    1.     最小のソリューション・サイズ
    2.     標準的な効率(自動モード)
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics (VIN = 12 V)
    8. 6.8 Typical Characteristics (VIN = 24 V)
    9. 6.9 Typical Characteristics (VIN = 36 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Input Capacitor Selection
      3. 7.3.3  Output Capacitor Selection
      4. 7.3.4  Transient Response
      5. 7.3.5  Feed-Forward Capacitor
      6. 7.3.6  Switching Frequency (RT)
      7. 7.3.7  Synchronization (SYNC/MODE)
      8. 7.3.8  Output Enable (EN)
      9. 7.3.9  Programmable System UVLO (EN)
      10. 7.3.10 Internal LDO and BIAS_SEL
      11. 7.3.11 Power Good (PGOOD) and Power Good Pull-Up (PGOOD_PU)
      12. 7.3.12 Mode Select (Auto or FPWM)
      13. 7.3.13 Soft Start and Voltage Tracking
      14. 7.3.14 Voltage Dropout
      15. 7.3.15 Overcurrent Protection (OCP)
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Auto Mode
      3. 7.4.3 FPWM Mode
      4. 7.4.4 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Setpoint
        2. 8.2.2.2 Setting the Switching Frequency
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Feed-Forward Capacitor (CFF)
        6. 8.2.2.6 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Theta JA vs PCB Area
    4. 10.4 Package Specifications
    5. 10.5 EMI
      1. 10.5.1 EMI Plots
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報
    1. 12.1 Tape and Reel Information

6.5 Electrical Characteristics

Limits apply over TA = –40°C to +105°C, VIN = 24 V, VOUT = 5 V, IOUT = IOUT maximum, fsw = 500 kHz, FPWM mode (unless otherwise noted); CIN1 = 3x 10 µF, 50-V, 1210 ceramic; CIN2 = 2x 4.7 µF, 50-V, 1210 ceramic; COUT = 6x 22 µF, 25-V, 1210 ceramic. Minimum and maximum limits are specified through production test or by design. Typical values represent the most likely parametric norm and are provided for reference only.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE (VIN)
VIN Input voltage range Over IOUT range, VOUT = 2.5 V, fSW = 350 kHz 3.5(1) 36 V
VIN turn on VIN increasing, VOUT = 2.5 V, IOUT = 0 A 3.12 V
VIN turn off VIN decreasing, VOUT = 2.5 V, IOUT = 0 A 2.62 V
ISHDN Shutdown supply current VIN = 12 V, VEN = 0 V, IOUT = 0 A 0.8 10 µA
INTERNAL LDO (VCC, BIAS_SEL)
VCC Internal VCC voltage PWM operation 3.27 V
PFM operation 3.1 V
IBIAS_SEL BIAS_SEL quiescent current (non-switching) VIN = 12 V, VFB = 1.5 V, VEN = 2 V, VBIAS_SEL = 3.3 V 21 50 µA
FEEDBACK
VFB Feedback voltage(2) –40°C ≤ TJ = TA ≤ 125°C, IOUT = 0 A, Over VIN range, VOUT = 2.5 V, fSW = 350 kHz 0.987 1.006 1.017 V
Load regulation Over IOUT range, TA = 25 °C 0.1%
IFB Feedback leakage current VFB = 1 V 0.2 65 nA
CURRENT
IOUT Output current Natural convection, TA = 25 °C 0 6 A
Overcurrent threshold 9 A
PERFORMANCE
ƞ Efficiency IOUT = 3 A, TA = 25 °C 91%
SOFT START
TSS Internal soft start time SS pin open 5 ms
ISSC Soft-start charge current VIN = 12 V, VFB = 1.5 V, VEN = 2 V, VSS/TRK = 0.5 V 1.8 2 2.2 µA
ENABLE (EN)
VEN-H EN rising threshold 1.14 1.2 1.25 V
VEN-HYS EN hysteresis voltage -100 mV
IEN EN Input leakage current VIN = 12 V, VFB = 1.5 V, VEN = 2 V 1.4 200 nA
POWER GOOD (PGOOD)
VPGOOD PGOOD thresholds Overvoltage 106% 110% 113%
Undervoltage 86% 90% 93%
PGOOD low voltage 0.5-mA pullup, VEN = 0 V 0.3 V
VINPG Minimum VIN for valid PGOOD 50-μA pullup, VEN = 0 V, TJ = TA = 25°C 1.3 2 V
(1) For output voltages ≤ 5 V, the recommended minimum VIN is 3.5 V or (VOUT + 1 V), whichever is greater. For output voltages > 5 V,
the recommended minimum VIN is (1.1 × VOUT). See Voltage Dropout for more information.
(2) The overall output voltage tolerance will be affected by the tolerance of the external RFBT and RFBB resistors.