JAJSFO3D June   2018  – June 2021 AMC1302

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specification
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Shunt Resistor Sizing
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

6.9 Electrical Characteristics

minimum and maximum specifications apply from TA = – 55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, INP = – 50 mV to + 50 mV, and INN = GND1; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
VCMov Common-mode overvoltage detection level (VINP + VINN) / 2 to GND1 VDD1 – 2 V
Hysteresis of common-mode overvoltage detection level 60 mV
VOS Input offset voltage(1) (2) TA = 25°C, VINP = VINN = GND1 –50 ±2.5 50 µV
TCVOS Input offset drift(1) (2) (3) –0.8 ±0.15 0.8 µV/°C
CMRR Common-mode rejection ratio fIN = 0 Hz, VCM min ≤ VCM ≤ VVCM max –100 dB
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max –98
CIN Single-ended input capacitance INN = GND1, fIN = 300 kHz 4 pF
CIND Differential input capacitance fIN = 300 kHz 2
RIN Single-ended input resistance INN = GND1 4.75 kΩ
RIND Differential input resistance 4.9
IIB Input bias current INP = INN = GND1; IIB = (IIBP + IIBN) / 2 –48.5 –36 –28.5 uA
TCIIB Input bias current drift ±1.5 nA/°C
IIO Input offset current IIO = IIBP – IIBN ±10 nA
ANALOG OUTPUT
Nominal gain 41
EG Gain error(1) TA = 25°C –0.2% ±0.04% 0.2%
TCEG Gain error drift(1) (4) –35 ±3 35 ppm/°C
Nonlinearity(1) –0.03% ±0.01% 0.03%
Nonlinearity drift 1 ppm/°C
THD Total harmonic distortion fIN = 10 kHz –85 dB
Output noise INP = INN = GND1, fIN = 0 Hz,
BW = 100 kHz brickwall filter		 260 µVRMS
SNR Signal-to-noise ratio fIN = 1 kHz, BW = 10 kHz 80 84 dB
fIN = 10 kHz, BW = 100 kHz 70
PSRR Power-supply rejection ratio(2) PSRR vs VDD1, at DC –113 dB
PSRR vs VDD1,
100-mV and 10-kHz ripple		 –108
PSRR vs VDD2, at DC –116
PSRR vs VDD2,
100-mV and 10-kHz ripple		 –87
VCMout Common-mode output voltage 1.39 1.44 1.49 V
VCLIPout Clipping differential output voltage VOUT = (VOUTP – VOUTN);
|VIN| = |VINP – VINN| > |VClipping|		 –2.52 ±2.49 2.52 V
VFailsafe Failsafe differential output voltage VCM ≥ VCMov, or VDD1 missing –2.63 –2.57 –2.53 V
BW Output bandwidth 220 280 kHz
ROUT Output resistance On OUTP or OUTN < 0.2 Ω
Output short-circuit current On OUTP or OUTN, sourcing or sinking,
INN = INP = GND1, outputs shorted to
either GND2 or VDD2 		±14 mA
CMTI Common-mode transient immunity |GND1 – GND2| = 1 kV 100 150 kV/µs
POWER SUPPLY
VDD1POR VDD1 power-on-reset threshold voltage VDD1 falling 2.4 2.6 2.8 V
IDD1 High-side supply current 3.0 V ≤ VDD1 ≤ 3.6 V 6.2 8.5 mA
4.5 V ≤ VDD1 ≤ 5.5 V 7.2 9.8
IDD2 Low-side supply current 3.0 V ≤ VDD2 ≤ 3.6 V 5.3 7.2
4.5 V ≤ VDD2 ≤ 5.5 V 5.9 8.1
(1) The typical value includes one standard deviation ("sigma") at nominal operating conditions.
(2) This parameter is input referred.
(3) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCVOS = (ValueMAX - ValueMIN) / TempRange
(4) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = (ValueMAX - ValueMIN) / (Value(T=25℃) x TempRange) x 106