7 |
OUTPUT_ENABLE |
R/W |
1h |
Output Enable Override Value (in conjunction with Output Sleep State Select).
If the Override control is not set, the Output Enable will be set to 1.
A Digital reset 0x01[0] should be asserted after toggling Output Enable bit LOW to HIGH |
6 |
OUTPUT_ENABLE_OVERRIDE |
R/W |
0h |
Overrides Output Enable and Output Sleep State default
0: Disable override
1: Enable override |
5 |
OSC_CLOCK_OUTPUT_ENABLE
(AUTO_CLOCK_EN) |
R/W |
0h |
OSC Clock Output Enable
If there is a loss of lock, OSC clock is output onto PCLK. The frequency is selected in register 0x24.
1: Enable
0: Disable |
4 |
OUTPUT_SLEEP_STATE_SELECT |
R/W |
0h |
OSS Select Override value to control output state when LOCK is low (used in conjunction with Output Enable).
If the Override control is not set, the Output Sleep State Select will be set to 1. |
3 |
RESERVED |
R/W |
0h |
Reserved |
2 |
RESERVED |
R/W |
0h |
Reserved |
1 |
RESERVED |
R/W |
0h |
Reserved |
0 |
RESERVED |
R/W |
0h |
Reserved |