JAJSFS3C July   2018  – January 2023 OPA855

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input and ESD Protection
      2. 9.3.2 Feedback Pin
      3. 9.3.3 Wide Gain-Bandwidth Product
      4. 9.3.4 Slew Rate and Output Stage
    4. 9.4 Device Functional Modes
      1. 9.4.1 Split-Supply and Single-Supply Operation
      2. 9.4.2 Power-Down Mode
  10. 10Application, Implementation, and Layout
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Typical Application
      1. 10.3.1 Design Requirements
      2. 10.3.2 Detailed Design Procedure
      3. 10.3.3 Application Curves
    4. 10.4 Power Supply Recommendations
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

9.2 Functional Block Diagram

The OPA855 is a classic voltage feedback operational amplifier (op amp) with two high-impedance inputs and a low-impedance output. Standard application circuits are supported, like the two basic options shown in #X6445 and #X8451. The resistor on the noninverting pin is used for bias current cancellation to minimize the output offset voltage. In a noninverting configuration the additional resistors on the noninverting pin add noise to the system so if SNR is critical, the resistor can be eliminated. In an inverting configuration the noninverting node is typically connected to a DC voltage, so the high-frequency noise contribution from the bias cancellation resistor can be bypassed by adding a large 1-µF capacitor in parallel to the resistor to shunt the noise. The DC operating point for each configuration is level-shifted by the reference voltage (VREF), which is typically set to midsupply in single-supply operation. VREF is typically connected to ground in split-supply applications.

GUID-58121792-32D0-492B-88A2-4246DA7E99D9-low.gif Figure 9-1 Noninverting Amplifier
GUID-94D8DE52-4636-46AB-AEEC-83BFB82E4C69-low.gif Figure 9-2 Inverting Amplifier