JAJSFU8D November 2017 – June 2024 ADS8166 , ADS8167 , ADS8168
PRODUCTION DATA
This register reflects the ALERT pin status for the analog input channels. The bits in this register are updated after every conversion.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALERT_AIN7 | ALERT_AIN6 | ALERT_AIN5 | ALERT_AIN4 | ALERT_AIN3 | ALERT_AIN2 | ALERT_AIN1 | ALERT_AIN0 |
R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | R-0b | R-0b |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | ALERT_AIN7 | R | 0b | These bits indicate that either the high or low
threshold for the respective analog input has been exceeded by the
last conversion result from the respective analog input. 0b = Neither the high or low threshold have been exceeded 1b = Either the high threshold, the low threshold, or both thresholds have been exceeded |
6 | ALERT_AIN6 | R | 0b | |
5 | ALERT_AIN5 | R | 0b | |
4 | ALERT_AIN4 | R | 0b | |
3 | ALERT_AIN3 | R | 0b | |
2 | ALERT_AIN2 | R | 0b | |
1 | ALERT_AIN1 | R | 0b | |
0 | ALERT_AIN0 | R | 0b |
Bits in this register reflect the result of the logical OR of the corresponding channel bits in the CURR_ALERT_HI_STATUS and CURR_ALERT_LO_STATUS registers. The status of the individual bits in this register is evaluated after every conversion. The contents of this register ascertain if the last output data are within the specified high and low thresholds for the respective analog input channels.