JAJSFU8D November 2017 – June 2024 ADS8166 , ADS8167 , ADS8168
PRODUCTION DATA
The device provides an option to increase the SDO bus width from one bit (default, single SDO-0) to two bits (dual SDO) when operating with any of the data transfer protocols. To operate the device in dual SDO mode, set the SDO_WIDTH bit in the SDO_CNTL1 register to 1b. In this mode, the SDO-1/SEQSTS pin functions as SDO-1.
As shown in Figure 6-23 and Figure 6-24, two bits of data are launched on the two SDO pins (SDO-0 and SDO-1) on every SCLK launch edge in dual SDO mode.