JAJSFY2B August 2018 – June 2021 LM5146-Q1
PRODUCTION DATA
Figure 11-2 shows an example PCB layout based on the LM5146-Q1-EVM12V design. The power component connections are made on the top layer with wide, copper-filled polygon areas. The SW connection from the power MOSFETs to the inductor is purposely kept at minimum area to reduce radiated EMI. A power ground plane is placed on layer 2 with 6 mil (0.15 mm) spacing to the top layer, see Figure 11-3. As a result, the buck regulator hot loop has a small effective area based on this tightly-coupled GND plane directly underneath the MOSFETs.
The LM5146-Q1 controller is located close to the gate terminals of the MOSFETs such that the gate drive traces are routed short and direct. Refer to the LM5146-Q1-EVM12V Evaluation Module User's Guide for more detail.