JAJSG99
September 2018
ADS1235
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
ブロック図
ADC変換ノイズ
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
Noise Performance
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Inputs
8.3.1.1
ESD Diodes
8.3.1.2
Input Multiplexer
8.3.1.3
Temperature Sensor
8.3.1.4
Inputs Open
8.3.1.5
Internal VCOM Connection
8.3.1.6
Alternate Functions
8.3.2
PGA
8.3.2.1
Input Voltage Range
8.3.2.2
PGA Bypass Mode
8.3.3
PGA Voltage Monitor
8.3.4
Reference Voltage
8.3.4.1
External Reference
8.3.4.2
AVDD – AVSS Reference (Default)
8.3.4.3
Reference Monitor
8.3.5
General-Purpose Input/Outputs (GPIOs)
8.3.6
Modulator
8.3.7
Digital Filter
8.3.7.1
Sinc Filter
8.3.7.1.1
Sinc Filter Frequency Response
8.3.7.2
FIR Filter
8.3.7.2.1
FIR Filter Frequency Response
8.3.7.3
Filter Bandwidth
8.3.7.4
50-Hz and 60-Hz Normal Mode Rejection
8.4
Device Functional Modes
8.4.1
Conversion Control
8.4.1.1
Continuous-Conversion Mode
8.4.1.2
Pulse-Conversion Mode
8.4.1.3
Conversion Latency
8.4.1.4
Start-Conversion Delay
8.4.2
Chop Mode
8.4.3
AC-Bridge Excitation Mode
8.4.4
ADC Clock Mode
8.4.5
Power-Down Mode
8.4.5.1
Hardware Power-Down
8.4.5.2
Software Power-Down
8.4.6
Reset
8.4.6.1
Power-on Reset
8.4.6.2
Reset by Pin
8.4.6.3
Reset by Command
8.4.7
Calibration
8.4.7.1
Offset and Full-Scale Calibration
8.4.7.1.1
Offset Calibration Registers
8.4.7.1.2
Full-Scale Calibration Registers
8.4.7.2
Offset Self-Calibration (SFOCAL)
8.4.7.3
Offset System-Calibration (SYOCAL)
8.4.7.4
Full-Scale Calibration (GANCAL)
8.4.7.5
Calibration Command Procedure
8.4.7.6
User Calibration Procedure
8.5
Programming
8.5.1
Serial Interface
8.5.1.1
Chip Select (CS)
8.5.1.2
Serial Clock (SCLK)
8.5.1.3
Data Input (DIN)
8.5.1.4
Data Output/Data Ready (DOUT/DRDY)
8.5.1.5
Serial Interface Auto-Reset
8.5.2
Data Ready (DRDY)
8.5.2.1
DRDY in Continuous-Conversion Mode
8.5.2.2
DRDY in Pulse-Conversion Mode
8.5.2.3
Data Ready by Software Polling
8.5.3
Conversion Data
8.5.3.1
Status byte (STATUS)
8.5.3.2
Conversion Data Format
8.5.4
CRC
8.5.5
Commands
8.5.5.1
NOP Command
8.5.5.2
RESET Command
8.5.5.3
START Command
8.5.5.4
STOP Command
8.5.5.5
RDATA Command
8.5.5.6
SYOCAL Command
8.5.5.7
GANCAL Command
8.5.5.8
SFOCAL Command
8.5.5.9
RREG Command
8.5.5.10
WREG Command
8.5.5.11
LOCK Command
8.5.5.12
UNLOCK Command
8.6
Register Map
8.6.1
Device Identification (ID) Register (address = 00h) [reset = Cxh]
Table 28.
ID Register Field Descriptions
8.6.2
Device Status (STATUS) Register (address = 01h) [reset = 01h]
Table 29.
STATUS Register Field Descriptions
8.6.3
Mode 0 (MODE0) Register (address = 02h) [reset = 24h]
Table 30.
MODE0 Register Field Descriptions
8.6.4
Mode 1 (MODE1) Register (address = 03h) [reset = 01h]
Table 31.
MODE1 Register Field Descriptions
8.6.5
Mode 2 (MODE2) Register (address = 04h) [reset = 00h]
Table 32.
MODE2 Register Field Descriptions
8.6.6
Mode 3 (MODE3) Register (address = 05h) [reset = 00h]
Table 33.
MODE3 Register Field Descriptions
8.6.7
Reference Configuration (REF) Register (address = 06h) [reset = 05h]
Table 34.
REF Register Field Descriptions
8.6.8
Offset Calibration (OFCALx) Registers (address = 07h, 08h, 09h) [reset = 00h, 00h, 00h]
Table 35.
OFCAL0, OFCAL1, OFCAL2 Registers Field Description
8.6.9
Full-Scale Calibration (FSCALx) Registers (address = 0Ah, 0Bh, 0Ch) [reset = 00h, 00h, 40h]
Table 36.
FSCAL0, FSCAL1, FSCAL2 Registers Field Description
8.6.10
Reserved (RESERVED) Register (address = 0Dh) [reset = FFh]
Table 37.
RESERVED Register Field Descriptions
8.6.11
Reserved (RESERVED) Register (address = 0Eh) [reset = 00h]
Table 38.
RESERVED Register Field Descriptions
8.6.12
Reserved (RESERVED) Register (address = 0Fh) [reset = 00h]
Table 39.
RESERVED Register Field Descriptions
8.6.13
PGA Configuration (PGA) Register (address = 10h) [reset = 00h]
Table 40.
PGA Register Field Descriptions
8.6.14
Input Multiplexer (INPMUX) Register (address = 11h) [reset = FFh]
Table 41.
INPMUX Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.1.1
Input Range
9.1.2
Input Overload
9.1.3
Unused Inputs and Outputs
9.1.4
Multiplexed 2-Bridge Input Example
9.1.5
AC-Bridge Excitation Example
9.1.6
Serial Interface and Digital Connections
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Initialization Setup
10
Power Supply Recommendations
10.1
Power-Supply Decoupling
10.2
Analog Power-Supply Clamp
10.3
Power-Supply Sequencing
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントのサポート
12.1.1
関連資料
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
2
アプリケーション
重量計および歪みゲージ・デジタイザ
ダイナミック計量システム
圧力測定
プロセス分析