JAJSGH2B November 2017 – September 2022 ADS7142-Q1
PRODUCTION DATA
The ADC can be configured in high-speed I2C mode by providing an I2C frame with one of the HS-mode codes (08h to 0Fh).
After receiving one of the HS-mode codes, the ADC sets the HS_MODE bit in the OPMODE_I2CMODE_STATUS register and remains in high-speed I2C mode until a STOP condition is received in an I2C frame.