12ビット、RF サンプリング A/D コンバータ (ADC)" />
JAJSGI4B November 2018 – March 2021 ADC12DJ3200QML-SP
PRODUCTION DATA
ADDRESS | RESET | ACRONYM | REGISTER NAME | SECTION |
---|---|---|---|---|
0x2C0 | Undefined | ALARM | Alarm Interrupt Status Register | Section 7.6.3.1 |
0x2C1 | 0x1F | ALM_STATUS | Alarm Status Register | Section 7.6.3.2 |
0x2C2 | 0x1F | ALM_MASK | Alarm Mask Register | Section 7.6.3.3 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ALARM | ||||||
R | R |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | RESERVED | R | Undefined | RESERVED |
0 | ALARM | R | Undefined | This bit returns a 1 whenever any alarm occurs that is unmasked in the ALM_STATUS register. Use ALM_MASK to mask (disable) individual alarms. CAL_STATUS_SEL can be used to drive the ALARM bit onto the CALSTAT output pin to provide a hardware alarm interrupt signal. |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | PLL_ALM | LINK_ALM | REALIGNED_ALM | NCO_ALM | CLK_ALM | ||
R/W-000 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-5 | RESERVED | R/W | 000 | RESERVED |
4 | PLL_ALM | R/W | 1 | PLL lock lost alarm. This bit is set whenever the PLL is not locked. Write a 1 to clear this bit. |
3 | LINK_ALM | R/W | 1 | Link alarm. This bit is set whenever the JESD204B link is enabled, but is not in the DATA_ENC state. Write a 1 to clear this bit. |
2 | REALIGNED_ALM | R/W | 1 | Realigned alarm. This bit is set whenever SYSREF causes the internal clocks (including the LMFC) to be realigned. Write a 1 to clear this bit. |
1 | NCO_ALM | R/W | 1 | NCO alarm. This bit can be used to detect an upset to the NCO phase. This bit is set when any of the following occur:
Write a 1 to clear this bit. |
0 | CLK_ALM | R/W | 1 | Clock alarm. This bit can be used to detect an upset to the digital block and JESD204B clocks. This bit is set whenever the internal clock dividers for the A and B channels do not match. Write a 1 to clear this bit. |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | MASK_PLL_ALM | MASK_LINK_ALM | MASK_REALIGNED_ALM | MASK_NCO_ALM | MASK_CLK_ALM | ||
R/W-000 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-5 | RESERVED | R/W | 000 | RESERVED |
4 | MASK_PLL_ALM | R/W | 1 | When set, PLL_ALM is masked and does not impact the ALARM register bit. |
3 | MASK_LINK_ALM | R/W | 1 | When set, LINK_ALM is masked and does not impact the ALARM register bit. |
2 | MASK_REALIGNED_ALM | R/W | 1 | When set, REALIGNED_ALM is masked and does not impact the ALARM register bit. |
1 | MASK_NCO_ALM | R/W | 1 | When set, NCO_ALM is masked and does not impact the ALARM register bit. |
0 | MASK_CLK_ALM | R/W | 1 | When set, CLK_ALM is masked and does not impact the ALARM register bit. |