JAJSGO0C February 2018 – September 2019 BQ25882
PRODUCTION DATA.
REG0C is shown in Figure 49 and described in Table 21.
Return to Summary Table.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset | X | X | X | X | 0 | X | X | X |
Field | PG_STAT | VBUS_STAT[2:0] | RESERVED | ICO_STAT[1] | ICO_STAT[0] | VSYS_STAT |
Bit | Field | Type | Reset by REG_RST | Reset by WATCHDOG | Description | |
---|---|---|---|---|---|---|
7 | PG_STAT | R | No | No | Power Good Status:
0 – Not Power Good 1 – Power Good |
|
6 | VBUS_STAT[2] | R | No | No | VBUS Detection Status
000 – No Input 001 – USB Host SDP 010 – USB CDP (1.5 A) 011 – USB DCP (3.0 A) 100 – POORSRC detected 7 consecutive times 101 – Unknown Adapter (500 mA) 110 – Non-standard Adapter (1 A/2 A/2.1 A/2.4 A) 111 – OTG |
|
5 | VBUS_STAT[1] | R | No | No | ||
4 | VBUS_STAT[0] | R | No | No | ||
3 | RESERVED | R | No | No | Reserved bit always reads 0 | |
2 | ICO_STAT[1] | R | No | No | Input Current Optimizer (ICO) Status:
00 – ICO Disabled 01 – ICO Optimization is in progress 10 – Maximum input current detected 11 – Reserved |
|
1 | ICO_STAT[0] | R | No | No | ||
0 | VSYS_STAT | R | No | No | VSYS Regulation Status:
0 – Not in SYS_MIN regulation (BAT > VSYS_MIN) 1 – In SYS_MIN regulation (BAT < VSYS_MIN) |