JAJSGO0C February 2018 – September 2019 BQ25882
PRODUCTION DATA.
REG14 is shown in Figure 57 and described in Table 29.
Return to Summary Table.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Field | VBUS_OVP_
MASK |
TSHUT_MASK | BATOVP_MASK | TMR_MASK | SYS_SHORT_MASK | RESERVED | RESERVED | OTG_MASK |
Bit | Field | Type | Reset by REG_RST | Reset by WATCHDOG | Description | |
---|---|---|---|---|---|---|
7 | VBUS_OVP_MASK | R/W | Yes | No | Input over-voltage INT Mask:
0 – VBUS_OVP rising edge produces INT pulse 1 – VBUS_OVP rising edge does not produce INT pulse |
|
6 | TSHUT_MASK | R/W | Yes | No | Thermal Shutdown INT Mask:
0 – TSHUT rising edge produces INT pulse 1 – TSHUT rising edge does not produce INT pulse |
|
5 | BATOVP_MASK | R/W | Yes | No | Battery overvoltage INT Mask:
0 – BATOVP rising edge produces INT pulse 1 – BATOVP rising edge does not produce INT pulse |
|
4 | TMR_MASK | R/W | Yes | No | Charge Safety Timer Fault INT Mask:
0 – Timer expired rising edge produces INT pulse 1 – Timer expired rising edge does not produce INT pulse |
|
3 | SYS_SHORT_MASK | R/W | Yes | No | System Short Fault INT Mask:
0 – System short rising edge produces INT pulse 1 – System short rising edge does not produce INT pulse |
|
2 | RESERVED | R/W | Yes | No | Reserved bit always reads 0 | |
1 | RESERVED | R/W | Yes | No | Reserved bit always reads 0 | |
0 | OTG_MASK | R/W | Yes | No | OTG Buck Mode Fault INT Mask:
0 – OTG_STAT event produces INT 1 – OTG_STAT event does not produce INT |