JAJSGQ8C December   2018  – June 2022 TLIN2441-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings, IEC Specification
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Power Supply Characteristics
    7. 7.7 Electrical Characteristics
    8. 7.8 AC Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Test Circuit: Diagrams and Waveforms
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  LIN Pin
        1. 9.3.1.1 LIN Transmitter Characteristics
        2. 9.3.1.2 LIN Receiver Characteristics
          1. 9.3.1.2.1 Termination
      2. 9.3.2  TXD (Transmit Input)
      3. 9.3.3  RXD (Receive Output)
      4. 9.3.4  WAKE (High Voltage Local Wake Up Input)
      5. 9.3.5  WDT/CLK (Pin Programmable Watchdog Delay Input/SPI Clock)
      6. 9.3.6  WDI/SDI (Watchdog Timer Input/SPI Serial Data In)
      7. 9.3.7  PIN/nCS (Pin Watchdog Select/SPI Chip Select)
      8. 9.3.8  LIMP (LIMP Home output – High Voltage Open Drain Output)
      9. 9.3.9  nWDR/SDO (Watchdog Timeout Reset Output/SPI Serial Data Out)
      10. 9.3.10 VSUP (Supply Voltage)
      11. 9.3.11 GND (Ground)
      12. 9.3.12 EN/nINT (Enable Input/Interrupt Output in SPI Mode)
      13. 9.3.13 nRST/nWDR (Reset Output/Watchdog Timeout Reset Output)
      14. 9.3.14 VCC (Supply Output)
      15. 9.3.15 Protection Features
        1. 9.3.15.1 TXD Dominant Time Out (DTO)
        2. 9.3.15.2 Bus Stuck Dominant System Fault: False Wake Up Lockout
        3. 9.3.15.3 Thermal Shutdown
        4. 9.3.15.4 Under Voltage on VSUP
        5. 9.3.15.5 Unpowered Device and LIN Bus
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Sleep Mode
      3. 9.4.3 Standby Mode
      4. 9.4.4 Failsafe Mode
      5. 9.4.5 Wake-Up Events
        1. 9.4.5.1 Wake-Up Request (RXD)
        2. 9.4.5.2 Local Wake Up (LWU) via WAKE Terminal
      6. 9.4.6 Mode Transitions
      7. 9.4.7 Voltage Regulator
        1. 9.4.7.1 VCC
        2. 9.4.7.2 Output Capacitance Selection
        3. 9.4.7.3 Low-Voltage Tracking
        4. 9.4.7.4 Power Supply Recommendation
      8. 9.4.8 Watchdog
        1. 9.4.8.1 Watchdog Error Counter
        2. 9.4.8.2 Pin Control Mode
        3. 9.4.8.3 SPI Control Programming
        4. 9.4.8.4 Watchdog Timing
    5. 9.5 Programming
      1. 9.5.1 SPI Communication
        1. 9.5.1.1 Chip Select Not (nCS)
        2. 9.5.1.2 Serial Clock Input (CLK)
        3. 9.5.1.3 Serial Data Input (SDI)
        4. 9.5.1.4 Serial Data Output (SDO)
    6. 9.6 Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Normal Mode Application Note
        2. 10.2.1.2 Standby Mode Application Note
        3. 10.2.1.3 TXD Dominant State Timeout Application Note
      2. 10.2.2 Detailed Design Procedures
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

12.1 Layout Guidelines

  • Pin 1 (VSUP): This is the supply pin for the device. A 100 nF decoupling capacitor should be placed as close to the device as possible.
  • Pin 2 (LIMP): This pin is connected to external circuitry for a limp home mode if the watchdog has timed out causing a reset
  • Pin 3 (EN/nINT): When in pin control mode, this pin is the EN and is an input pin that is used to place the device in a low power sleep mode. If this feature is not used, the pin should be pulled high to the regulated voltage supply of the microprocessor through a series resistor, values between 1 kΩ and 10 kΩ. Additionally, a series resistor may be placed on the pinto limit current on the digital lines in the event of an over voltage fault. When in SPI communication mode, this pin becomes an output interrupt pin that is provided to the processor.
  • Pin 4 (GND): This is the ground connection for the device. This pin should be tied to the ground plane through a short trace with the use of two vias to limit total return inductance.
  • Pin 5 (LIN): This pin connects to the LIN bus. For responder node applications, a 200 pF capacitor to ground is implemented. For commander node applications, an additional series resistor and blocking diode should be placed between the LIN pin and the VSUP pin. See Figure 9-3.
  • Pin 6 (WDT/CLK): In pin control mode, this pin can be connected to VCC, GND or left open. In SPI communication mode, this pin is connected directly to the processor as the SPI CLK input.
  • Pin 7 (nWDR/SDO): In pin control mode. this pin is connected to the processors reset pin. In SPI communication mode. this pin is connected directly to the processor as the SPI serial data output from the TLIN2441-Q1
  • Pin 8 (WDI/SDI): In pin control mode, this input pin is connected to the processor. A 10 kΩ resistor should be connected to GND to avoid false triggers upon power up. In SPI communication mode, this pin is connected directly to the processor as the SPI serial data input into the TLIN2441
  • Pin 9 (PIN/nCS): For pin control mode, this pin should be connected directly to ground. For SPI communication mode, this pin should be connected directly to the processor.
  • Pin 10 (RXD): The pin is an open-drain output and requires and external pull-up resistor in the range of 1 kΩ to 10 kΩ to function properly. If the microprocessor paired with the transceiver does not have an integrated pull-up, an external resistor should be placed between RXD and the regulated voltage supply for the microprocessor. If RXD is connected to the VCC pin a higher pull-up resistor value can be used to reduce standby current.
  • Pin 11 (TXD): The TXD pin is the transmit input signal to the device from the processors. A series resistor can be placed to limit the input current to the device in the event of an over voltage on this pin. A capacitor to ground can be placed close to the input pin of the device to filter noise.
  • Pin 12 (nRST/nWDR): By default this pin connects to the processors GPIO to function as an interrupt or reset pin for an under voltage event. For SPI communication mode, this pin can be programmed as a processor reset due to a watchdog failure event.
  • Pin 13 (WAKE):This pin connects to VSUP through a resistor divider with the center tap connected to a switch to ground or VVSUP and is used as the local wake up pin. A 10 nF capacitor to ground should be placed at this center tap as shown in the application drawings.
  • Pin 14 (VCC): Output source, either 3.3 V or 5 V depending upon the version of the device and has decoupling capacitors to ground.
Note:

All ground and power connections should be made as short as possible and use at least two vias to minimize the total loop inductance.