JAJSGX9B August   2018  – January 2020 TLV1805-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      N チャネル MOSFET による逆電流保護
      2.      P チャネル MOSFET による逆電流および過電圧保護
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail to Rail Inputs
      2. 7.3.2 Power On Reset
      3. 7.3.3 High Power Push-Pull Output
      4. 7.3.4 Shutdown Function
      5. 7.3.5 Internal Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 External Hysteresis
        1. 7.4.1.1 Inverting Comparator With Hysteresis
        2. 7.4.1.2 Noninverting Comparator With Hysteresis
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
      4. 8.2.4 Reverse Current Protection Using MOSFET and TLV1805-Q1
        1. 8.2.4.1 Minimum Reverse Current
        2. 8.2.4.2 N-Channel Reverse Current Protection Circuit
          1. 8.2.4.2.1 N-Channel Oscillator Circuit
      5. 8.2.5 P-Channel Reverse Current Protection Circuit
      6. 8.2.6 P-Channel Reverse Current Protection With Overvotlage Protection
      7. 8.2.7 ORing MOSFET Controller
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

P-Channel Reverse Current Protection Circuit

Figure 70 shows the P-Channel circuit. In order to turn "on" the P-Channel MOSFET, the gate must be brought "Low" below VBATT . To accomplish this, the comparators Inverting input is tied to the battery side of the MOSFET to set the output low during forward current.

TLV1805-Q1 PCH_Bold_Q1.gifFigure 70. P-Channel Reverse Current Schematic

This design implements a "floating ground" topology, using D3, D4 and R12, to allow for clamping the comparator supply voltage as to not exceed the VGS(MAX) of the MOSFET. During a reverse voltage or supply drop, D4 also prevents C1 from discharging to allow some standby time to keep the comparator powered during the event.

During "normal" forward current operation, the quiescent current of the comparator circuit flows through D4 and R4. D3 provides the clamping during an overvoltage event.

R4 is sized to allow for minimum voltage drop during "normal" operation, but also to allow for dissipation during overvoltage events. R4 will see the battery voltage minus the D3 Zener voltage during an overvoltage event. Since the comparator supply voltage is clamped by D3, the maximum battery voltage is determined by the power dissipated by R4 and the VDS(MAX) of the MOSFET.

R2 limits the gate current should there be any transients and should be a low value to allow the peak currents needed to drive the MOSFET gate capacitance. R3 provides the pull-down needed when the comparator output goes high-Z during power-off to ensure the gate is pulled to zero volts to turn off the MOSFET.

R1 and D2 clamp the input voltage should the VBATT input go below the floating ground Voltage (such as in a battery reversal). A bonus feature is that during a reverse battery voltage condition, D2 and R1 pull the floating ground down towards the negative potential, providing power to the comparator during reverse voltage.

The output clamp diode D5 is used to anchor the output during light or floating loads. At light or no loads, there is a possibility the MOSFET could turn on due to the comparator offset voltage. The diode provides enough of a negative leakage to turn the MOSFET off.

If shutdown of the comparator circuit is desired, a transistor or MOSFET switch can be placed between the ground end of R4 and ground. The MOSFET will be in body diode mode when the comparator is disabled.