JAJSH25B
March 2019 – August 2019
LMK00804B-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
Table 1.
Absolute Maximum Ratings
Table 2.
ESD Ratings
Table 3.
Recommended Operating Conditions
Table 4.
Thermal Information
Table 5.
Power Supply Characteristics
Table 6.
LVCMOS / LVTTL DC Electrical Characteristics
Table 7.
Differential Input DC Electrical Characteristics
Table 8.
Switching Characteristics
Table 9.
Pin Characteristics
6.1
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Clock Enable Timing
8.4
Device Functional Modes
9
Applications and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Output Clock Interface Circuit
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.1.3.1
System-Level Phase Noise and Additive Jitter Measurement
9.2.2
Input Detail
9.2.3
Input Clock Interface Circuits
9.3
Do's and Don'ts
9.3.1
Power Dissipation Calculations
9.3.2
Thermal Management
9.3.3
Recommendations for Unused Input and Output Pins
9.3.4
Input Slew Rate Considerations
10
Power Supply Recommendations
10.1
Power Supply Considerations
10.1.1
Power-Supply Filtering
11
Layout
11.1
Layout Guidelines
11.1.1
Ground Planes
11.1.2
Power Supply Pins
11.1.3
Differential Input Termination
11.1.4
LVCMOS Input Termination
11.1.5
Output Termination
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントのサポート
12.1.1
関連資料
12.2
ドキュメントの更新通知を受け取る方法
12.3
コミュニティ・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
11
Layout