JAJSHG4 May 2019
ADVANCE INFORMATION for pre-production products; subject to change without notice.
Figure 6 illustrates various I2C frames for reading data.
When status flags are enabled, APPEND_STATUS is set to 10b and four bits are appended to the ADC output. The device outputs status flags in this order: {1b, 0b, CRCERR_IN, ALERT}. The level transitions on the digital interface, resulting from the fixed 1b and 0b in the status flags, can be used to detect if the digital outputs are shorted to a fixed voltage in the system. The CRCERR_IN flag reflects the corresponding bit in the GENERAL_CFG register. The ALERT flag is the output of the logical OR of the bits in the EVENT_FLAG register.