JAJSHG4 May 2019
ADVANCE INFORMATION for pre-production products; subject to change without notice.
The ADS7128 features an RMS computation module. Any one analog input channel can be selected for computing the RMS result. The RMS result is computed over a block of samples from the selected channel and the result can be read from the RMS_RESULT_LSB and RMS_RESULT_MSB registers. Equation 3 shows how the RMS result is computed by calculating the 16-bit square root of the mean of the accumulated result of the squares of the ADC conversion data.
where
The DC offset must be subtracted from the AC component because the analog input signal to the ADC is unipolar. DC subtraction can be enabled or disabled, as given by b in Equation 3, by configuring the DC_SUB field. The RMS result is 16 bits long and Equation 4 gives the size of the 1 LSB of RMS result.
The procedure for using the RMS module is outlined in the steps below: